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Thesis Projects

The following thesis projects are currently available in the AES group. If you are interested in one of these projects, please talk to the contact person mentioned in the project description.

If you are not interested in one of these projects but still would like to perform a project related to embedded, general-purpose, or high-performance computer architectures or compiler technology, please contact Philipp Habermann (p.habermann [1]) .

Also when you perform an external project related to AES themes and are looking for supervision from the AES group, please contact Philipp Habermann (p.habermann [2]) .

Graphics Processing Units (GPUs)

  • Porting OpenCl® on GEMU: The AES Simulation Framework for GPUs (PDF, 162,6 KB) [3]
  • Design and Implementation of an Efficient Spatial Locality Predictor for GPUs (PDF, 281,5 KB) [4]
  • Locality-Aware Thread Scheduling for GPUs (PDF, 357,6 KB) [5]

Compiler Technology

  • Automatic Tuning (PDF, 515,7 KB) [6]
  • Code Optimization for Embedded Processors (PDF, 531,8 KB) [7]
  • Domain-specific Loop Perforation (PDF, 2,9 MB) [8]
  • Compiler-based Exploitation of Local Memory (PDF, 146,9 KB) [9]

Multicore Architectures

  • Programming Models for Parallel Architectures (PDF, 615,0 KB) [10]
  • Validation of Scaling Models [11]
Prof. Dr. Ben Juurlink
Room E-N 642
Tel. +49.30.314-73130/73131
Request appointment

Secretary's office:
Sara Tennstedt
Room E-N 645
Tel. +49.30.314-73130
Consultation hours:
Mo, Tue, Wed and Thu 10:00 am - 12:00 am
or with appointment
Contact [12]

Postal address:
Technische Universität Berlin
Institut für Technische Informatik und Mikroelektronik (TIME)
Sekretariat EN 12
Einsteinufer 17- 6. OG
D-10587 Berlin

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