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TU Berlin

Inhalt des Dokuments

Mauricio Álvarez Mesa

Contact

Contact information
Room:
E-N 601/602
Tel.:
+49 (0)30 314-21357
Fax:
+49 (0)30 314-22943
E-Mail

Office hours:
with appointment
Address:
Sekretariat EN 12
Einsteinufer 17
D-10587 Berlin

Teaching

Publications

Alex Ramirez and Felipe Cabarcas and Ben Juurlink and Mauricio Alvarez Mesa and Friman Sanchez and Arnaldo Azevedo and Cor Meenderinck and Catalin Ciobanu and Sebastian Isaza and Gerogi Gaydadjiev (2010). The SARC Architecture. Micro, IEEE, 16 -29.


Arnaldo Azevedo and Ben Juurlink and Cor Meenderinck and Andrei Terechko and Jan Hoogerbrugge and Mauricio Alvarez Mesa and Alex Ramírez and Mateo Valero (2011). A Highly Scalable Parallel Implementation of H.264. Transactions on High-Performance Embedded Architectures and Compilers IV. Springer Berlin Heidelberg, 111-134.


Mauricio Alvarez Mesa and Chi Ching Chi and Ben Juurlink and V. George and T. Schierl (2012). Parallel Video Decoding in the Emerging HEVC Standard. Proceedings of the 37th International Conference on Acoustics, Speech, and Signal Processing (ICASSP) 2012


Chi Ching Chi and Mauricio Alvarez Mesa and Ben Juurlink and V. George and T. Schierl (2013). Improving the Parallelization Efficiency of HEVC Decoding. Proceedings of the 2012 International Conference on Image Processing (ICIP)


Ben Juurlink and Mauricio Alvarez-Mesa and Chi Ching Chi and Arnaldo Azevedo and Cor Meenderinck and Alex Ramirez (2012). Scalable Parallel Programming Applied to H.264/AVC Decoding. Springer.


Chi Ching Chi and Mauricio Alvarez-Mesa and Jan Lucas and Ben Juurlink and T. Schierl (2013). Parallel HEVC Decoding on Multi- and Many-core Architectures. A Power and Performance Analysis.. Journal of Signal Processing Systems


Chi Ching Chi and Mauricio Alvarez Mesa and Ben Juurlink and Clare, G. and Henry, F. and Pateux, S. and Schierl, T. (2012). Parallel Scalability and Efficiency of HEVC Parallelization Approaches. IEEE Transactions on Circuits and Systems for Video Technology


Jan Lucas and Sohan Lal and Michael Andersch and Mauricio Alvarez Mesa and Ben Juurlink (2013). How a Single Chip Causes Massive Power Bills - GPUSimPow: A GPGPU Power Simulator. Proc. IEEE Int. Symposium on Performance Analysis of Systems and Software (ISPASS)


Benjamin Bross and Mauricio Alvarez-Mesa and Valeri George and Chi Ching Chi and Tobias Mayer and Ben Juurlink and Thomas Schierl (2013). HEVC Real-time Decoding. Proc. SPIE. Applications of Digital Image Processing XXXVI, 88561R-88561R-11.


Benjamin Bross and Valeri George and Mauricio Alvarez-Mesa and Tobias Mayer and Chi Ching Chi and Jens Brandenburg and Thomas Schierl and Detlev Marpe and Ben Juurlink (2013). HEVC Performance and Complexity for 4K Video. Proc. Third IEEE Int. Conf. on Consumer Electronics - Berlin (ICCE-Berlin), 44-47.


Jan Lucas and Sohan Lal and Mauricio Alvarez-Mesa and Ahmed Elhossini and Ben Juurlink (2013). DART: A GPU Architecture Exploiting Temporal SIMD for Divergent Workloads. Proc. 9th Int. Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems, Fiuggi, Italy (ACACES' 13)


Sohan Lal and Jan Lucas and Mauricio Alvarez-Mesa and Ahmed Elhossini and Ben Juurlink (2013). Exploring GPGPUs Workload Characteristics and Power Consumption. Proc. 9th Int. Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems, Fiuggi, Italy (ACACES' 13)


Jan Lucas and Mauricio Alvarez-Mesa and Michael Andersch and Ben Juurlink (2014). Sparkk: Quality-Scalable Approximate Storage in DRAM. The Memory Forum


Sohan Lal and Jan Lucas and Michael Andersch and Mauricio Alvarez-Mesa and Ahmed Elhossini and Ben Juurlink (2014). GPGPU Workload Characteristics and Performance Analysis. Proc. 14th Int. Conf. on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV), 115-124.


Michael Andersch and Jan Lucas and Mauricio Alvarez-Mesa and Ben Juurlink (2014). Analyzing GPGPU Pipeline Latency. Proc. 10th Int. Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems, Fiuggi, Italy (ACACES' 14)


Biography

Lupe

Mauricio Alvarez Mesa is currently a postdoctoral researcher at the Embedded Systems Architecture group at TU Berlin. He received the MSc degree in Electronic Engineering in 2000 from University of Antioquia, Medellin, Colombia, and the PhD degree in Computer Science in 2011 from Universitat Politècnica de Catalunya (UPC), Barcelona, Spain. From 2006 to 2011 he was an adjunct lecturer at UPC. He was a summer intern at IBM Haifa Research labs, Israel in 2007, and a research visitor at Technische Universität Berlin (TU Berlin), Berlin, Germany in 2011. From 2012 to 2013 he was a research associate at the Multimedia Communications group of Fraunhofer Institute HHI in Berlin. At TU Berlin he is currently leading the LPGPU European project and the High Performance Video Coding research line. He has co-authored more than 20 publications in the field of video coding, parallel computing and computer architecture.

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