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TU Berlin

Inhalt des Dokuments

Antonio Saavedra

Contact

Contact information
Room:
E-N 636
Tel.:
+49 (0)30 314-24294
E-Mail
antonio [1]
Address:
Sekretariat N 12
Einsteinufer 17
D-10587 Berlin

Research

  • Reconfigurable hardware design
  • FPGA-based custom hardware accelerators
  • High-level Synthesis tools
  • Embedded systems and computer architecture

Teaching

Teaching
Hardwarepraktikum [2]
SoSe 2020/ Sose 2021
Rechnerorganisation Praktikum [3]
WiSe 19/20, WiSe 20/21

Master/Bachelor Projects

  • High-level Synthesis design of Neural Networks Accelerators
  • Integrations of custom accelerators to RISC-V architectures

Publications

Saavedra, Antonio and Pezoa, Jorge E. and Zarkesh-Ha, Payman and Figueroa, Miguel (2017). An embedded system for face classification in infrared video using sparse representation [7]. Applications of Digital Image Processing XL. International Society for Optics and Photonics, 103961N.


Saavedra, Antonio and Hernández, Cecilia and Figueroa, Miguel (2018). Heavy-Hitter Detection Using a Hardware Sketch with the Countmin-CU Algorithm [8]. 2018 21st Euromicro Conference on Digital System Design (DSD), 38–45.


Redlich, Rodolfo and Araneda, Luis and Saavedra, Antonio and Figueroa, Miguel (2016). An Embedded Hardware Architecture for Real-Time Super-Resolution in Infrared Cameras [9]. 2016 Euromicro Conference on Digital System Design (DSD), 184–191.


Saavedra, Antonio and Lehnert, Hans and Hernández, Cecilia and Carvajal, Gonzalo and Figueroa, Miguel (2020). Mining Discriminative K-Mers in DNA Sequences Using Sketches and Hardware Acceleration [10]. IEEE Access, 114715–114732.


Soto, Javier E. and Valenzuela, Wladimir E. and Díaz, Silvana and Saavedra, Antonio and Figueroa, Miguel and Ghasemi, Javad and Zarkesh-Ha, Payman (2017). An intelligent readout integrated circuit (iROIC) with on-chip local gradient operations [11]. 2017 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS), 360–362.


Valenzuela, Wladimir and Saavedra, Antonio and Zarkesh-Ha, Payman and Figueroa, Miguel (2022). Motion-Based Object Location on a Smart Image Sensor Using On-Pixel Memory [12]. Sensors, 6538.


Saavedra, Antonio and Nazar, Gabriel L. and Stawinoga, Nicolai and Juurlink, Ben (2021). Evaluation of high-level languages for general FPGA acceleration [13]. Proc. of 17th Int. Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems, Fiuggi, Italy (ACACES '21)


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