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Prof. Dr. Ben Juurlink

Biography

Lupe

Prof. Dr. Ben Juurlink received the M.Sc. degree from Utrecht University, Utrecht, The Netherlands, and the Ph.D. degree from Leiden University, Leiden, The Netherlands, in 1992 and 1997, respectively.

In 1997-1998 he worked as a post-doctoral researcher at the Heinz Nixdorf Institute in Paderborn, Germany, and from 1998 to 2009 he was a faculty member (first assistant professor, then associate professor) of the Computer Engineering Laboratory of Delft University of Technology, Delft, The Netherlands. Currently, he is professor for Embedded Systems Architectures in the Faculty of Electrical Engineering and Computer Science of Berlin University of Technology, Berlin, Germany. He is also co-founder of Spin Digital GmbH.

Dr. Juurlink’s research interests include multi- and many-core processors, reconfigurable computing, and the art of mapping applications effectively and efficiently to computer architectures. He has (co-)authored more than 130 articles in international conferences and journals, and received best paper awards at the IASTED International Conference on Parallel and Distributed Computing and Systems (PDCS) in 2002, and at the third IEEE International Conference on Consumer Electronics – Berlin (ICCE-Berlin). He has also received a Technology Transfer Award from the HiPEAC Network of Excellence for transferring some of the video coding technology that has been developed in his group to a Greece-based SME.

Dr. Juurlink is a senior member of the ACM and a senior member of the IEEE. He has been the Principal Investigator of several national research projects, Work Package leader in several European projects, and Coordinator of the EU projects LPGPU, Film265, and LPGPU2. He has served on many program committees, is an editor of the Elsevier journal on Microprocessors and Microsystems: Embedded Hardware Design, and was the general co-chair of the HiPEAC conference in 2013.

Professional Experience

Professor for Embedded Systems Architectures


Berlin University of Technology, Germany


01/2010 -
present


Associate professor


Delft University of Technology, Netherlands


02/2007 - 12/2009


Director of education for master's programs in Computer Engineering and Embedded Systems


Delft University of Technology, Netherlands


09/2006 - 12/2009


Assistant professor


Delft University of Technology, Netherlands


09/1999 - 01/2007


Postdoctoral fellow


Delft University of Technology, Netherlands


09/1998 - 08/1999


Postdoctoral fellow


Paderborn University, Germany


01/1997 - 07/1998


Postdoctoral fellow


Leiden University, Netherlands


09/1996 - 12/1996


Visiting researcher


Max-Planck-Institut für Informatik, Saarbrücken, Germany


02/1995


Research assistant


Leiden University, Netherlands


09/1992 - 08/1996


Teaching assistant


Utrecht University, Netherlands


09/1990 - 01/1992


Education

PhD degree in computer science


Leiden University, Netherlands. Thesis title: Computational models for parallel computers


02/1997


MSc degree in computer science


Utrecht University, Netherlands


08/1992


Publications

Jan H. Schönherr and Ben Juurlink and Jan Richling (2013). Topology-aware Equipartitioning with Coscheduling on Multicore Systems. 6th International Workshop on Multi-/Many-core Computing Systems.


Michael Andersch and Jan Lucas and Mauricio Alvarez-Mesa and Ben Juurlink (2015). On Latency in GPU Throughput Microarchitectures. Proc. IEEE Int. Symposium on Performance Analysis of Systems and Software (ISPASS), 169-170.


Daniel Maier and Biagio Cosenza and Ben Juurlink (2018). Local Memory-Aware Kernel Perforation. Proceedings of the 2018 International Symposium on Code Generation and Optimization. ACM.


Jan Lucas and Sohan Lal and Mauricio Alvarez-Mesa and Ahmed Elhossini and Ben Juurlink (2013). DART: A GPU Architecture Exploiting Temporal SIMD for Divergent Workloads. Proc. 9th Int. Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems, Fiuggi, Italy (ACACES' 13)


Gervin Thomas and Ahmed Elhossini and Ben Juurlink (2014). A Generic Implementation of a Quantified Predictor for FPGAs. GLSVLSI '14: Proceedings of the 24th ACM International Conference on Great Lakes Symposium on VLSI. ACM.


Sohan Lal and Jan Lucas and Mauricio Alvarez-Mesa and Ahmed Elhossini and Ben Juurlink (2013). Exploring GPGPUs Workload Characteristics and Power Consumption. Proc. 9th Int. Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems, Fiuggi, Italy (ACACES' 13)


Chi Ching Chi and Mauricio Alvarez Mesa and Ben Juurlink and V. George and T. Schierl (2013). Improving the Parallelization Efficiency of HEVC Decoding. Proceedings of the 2012 International Conference on Image Processing (ICIP)


Michael Andersch and Jan Lucas and Mauricio Alvarez-Mesa and Ben Juurlink (2014). Analyzing GPGPU Pipeline Latency. Proc. 10th Int. Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems, Fiuggi, Italy (ACACES' 14)


Jan Lucas and Ben Juurlink (2016). ALUPower: Data Dependent Power Consumption in GPUs. Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS), 2016 IEEE 23rd International Symposium on


Biao Wang and Diego F. de Souza and Mauricio Alvarez-Mesa and Chi Ching Chi and Ben Juurlink and Aleksandar Ilic and Nuno Roma and Leonel Sousa (2016). Efficient HEVC decoder for heterogeneous CPU with GPU systems. 2016 IEEE 18th International Workshop on Multimedia Signal Processing (MMSP), 1-6.


Stefan Hauser and Nico Moser and Carsten Gremzow and Ben Juurlink (2010). Transport Triggered Interconnection Network for a Scalable Application-Specific Processor. ACACES 2010 - Poster Abstracts. High Performance and Embedded Architecture and Compilation, 155–158.


Nikita Popov and Biagio Cosenza and Ben Juurlink and Dmitry Stogov (2017). Static Optimization in PHP 7. 26th International Conference on Compiler Construction (CC), 65–75.


Biagio Cosenza and Juan Durillo and Stefano Ermon and Ben Juurlink (2017). Autotuning Stencil Computations with Structural Ordinal Regression Learning. IEEE International Parallel and Distributed Processing Symposium (IPDPS), 287–296.


Jan Lucas and Sohan Lal and Ben Juurlink (2018). Optimal DC/AC Data Bus Inversion Coding. Proc. Int. Conf on Design Automation, and Test in Europe,(DATE)


Daniel Maier, Nadjib Mammeri, Biagio Cosenza, Ben Juurlink (2019). Approximating Memory-bound Applications on Mobile GPUs. 2019 International Conference on High Performance Computing & Simulation (HPCS)


Older Publications

Further Publications of Prof. Juurlink  are here available.

Zusatzinformationen / Extras

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