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Prof. Dr. Ben Juurlink


Lupe [1]

Prof. Dr. Ben Juurlink received the M.Sc. degree from Utrecht University, Utrecht, The Netherlands, and the Ph.D. degree from Leiden University, Leiden, The Netherlands, in 1992 and 1997, respectively.

In 1997-1998 he worked as a post-doctoral researcher at the Heinz Nixdorf Institute in Paderborn, Germany, and from 1998 to 2009 he was a faculty member (first assistant professor, then associate professor) of the Computer Engineering Laboratory of Delft University of Technology, Delft, The Netherlands. Currently, he is professor for Embedded Systems Architectures in the Faculty of Electrical Engineering and Computer Science of Berlin University of Technology, Berlin, Germany. He is also co-founder of Spin Digital GmbH.

Dr. Juurlink’s research interests include multi- and many-core processors, reconfigurable computing, and the art of mapping applications effectively and efficiently to computer architectures. He has (co-)authored more than 130 articles in international conferences and journals, and received best paper awards at the IASTED International Conference on Parallel and Distributed Computing and Systems (PDCS) in 2002, and at the third IEEE International Conference on Consumer Electronics – Berlin (ICCE-Berlin). He has also received a Technology Transfer Award from the HiPEAC Network of Excellence for transferring some of the video coding technology that has been developed in his group to a Greece-based SME.

Dr. Juurlink is a senior member of the ACM and a senior member of the IEEE. He has been the Principal Investigator of several national research projects, Work Package leader in several European projects, and Coordinator of the EU projects LPGPU, Film265, and LPGPU2. He has served on many program committees, is an editor of the Elsevier journal on Microprocessors and Microsystems: Embedded Hardware Design, and was the general co-chair of the HiPEAC conference in 2013.

Professional Experience

Professor for Embedded Systems Architectures

Berlin University of Technology, Germany

01/2010 -

Associate professor

Delft University of Technology, Netherlands

02/2007 - 12/2009

Director of education for master's programs in Computer Engineering and Embedded Systems

Delft University of Technology, Netherlands

09/2006 - 12/2009

Assistant professor

Delft University of Technology, Netherlands

09/1999 - 01/2007

Postdoctoral fellow

Delft University of Technology, Netherlands

09/1998 - 08/1999

Postdoctoral fellow

Paderborn University, Germany

01/1997 - 07/1998

Postdoctoral fellow

Leiden University, Netherlands

09/1996 - 12/1996

Visiting researcher

Max-Planck-Institut für Informatik, Saarbrücken, Germany


Research assistant

Leiden University, Netherlands

09/1992 - 08/1996

Teaching assistant

Utrecht University, Netherlands

09/1990 - 01/1992


PhD degree in computer science

Leiden University, Netherlands. Thesis title: Computational models for parallel computers


MSc degree in computer science

Utrecht University, Netherlands



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Michael Andersch and Jan Lucas and Mauricio Alvarez-Mesa and Ben Juurlink (2014). Analyzing GPGPU Pipeline Latency [13]. Proc. 10th Int. Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems, Fiuggi, Italy (ACACES' 14)

Jan Lucas and Ben Juurlink (2016). ALUPower: Data Dependent Power Consumption in GPUs [14]. Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS), 2016 IEEE 23rd International Symposium on

Biao Wang and Diego F. de Souza and Mauricio Alvarez-Mesa and Chi Ching Chi and Ben Juurlink and Aleksandar Ilic and Nuno Roma and Leonel Sousa (2016). Efficient HEVC decoder for heterogeneous CPU with GPU systems [15]. 2016 IEEE 18th International Workshop on Multimedia Signal Processing (MMSP), 1-6.

Stefan Hauser and Nico Moser and Carsten Gremzow and Ben Juurlink (2010). Transport Triggered Interconnection Network for a Scalable Application-Specific Processor [16]. ACACES 2010 - Poster Abstracts. High Performance and Embedded Architecture and Compilation, 155–158.

Nikita Popov and Biagio Cosenza and Ben Juurlink and Dmitry Stogov (2017). Static Optimization in PHP 7 [17]. 26th International Conference on Compiler Construction (CC), 65–75.

Biagio Cosenza and Juan Durillo and Stefano Ermon and Ben Juurlink (2017). Autotuning Stencil Computations with Structural Ordinal Regression Learning [18]. IEEE International Parallel and Distributed Processing Symposium (IPDPS), 287–296.

Jan Lucas and Sohan Lal and Ben Juurlink (2018). Optimal DC/AC Data Bus Inversion Coding [19]. Proc. Int. Conf on Design Automation, and Test in Europe,(DATE)

Daniel Maier, Nadjib Mammeri, Biagio Cosenza, Ben Juurlink (2019). Approximating Memory-bound Applications on Mobile GPUs [20]. 2019 International Conference on High Performance Computing & Simulation (HPCS)

Christina Quast and Angela Pohl and Biagio Cosenza and Ben Juurlink and Rainer Schwemmer (2018). Accelerating the RICH Particle Detector Algorithm on Intel Xeon Phi [21]. Parallel, Distributed and Network-based Processing (PDP), 2018 26th Euromicro International Conference on, 368–375.

C.H. Meenderinck and Ben Juurlink (2010). A Case for Hardware Task Management Support for the StarSS Programming Model [22]. Proceedings Conference on Digital System Design Architectures, Methods and Tools

Angela Pohl and Biagio Cosenza and Ben Juurlink (2018). Control Flow Vectorization for ARM NEON [23]. Proceedings of the 21st International Workshop on Software and Compilers for Embedded Systems, 66–75.

M Briejer and C.H. Meenderinck and Ben Juurlink (2010). Extending the Cell SPE with Energy Efficient Branch Prediction [24]. Proceedings Euro-Par Conference

Tamer Dallou and Ahmed Elhossini and Ben Juurlink (2013). FPGA-Based Prototype of Nexus++ Task Manager [25]. Proc. 6th Workshop on Many-Task Computing on Clouds, Grids, and Supercomputers (MTAGS) 2013, Co-located with SC 2013

Ben Juurlink and Jan Lucas and Nadjib Mammeri and Martyn Bliss and Georgios Keramidas and Chrysa Kokkala and Andrew Richards (2017). The LPGPU2 Project: Low-Power Parallel Computing on GPUs: Extended Abstract [26]. Proceedings of the 20th International Workshop on Software and Compilers for Embedded Systems. ACM, 76–80.

Gervin Thomas and Ben Juurlink and Dietmar Tutsch (2011). Traffic Prediction for NoCs using Fuzzy Logic [27]. High-performance and hardware-aware Computing - Proceedings of the Second International Workshop on New Frontiers in High-performane and Hardware-aware Computing (in Conjunction with HPCA-17). KIT Scientific Publishing, 33-40.

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Older Publications

Further Publications of Prof. Juurlink  are here [36]available.

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