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Prof. Dr. Ben Juurlink


Lupe [1]

Prof. Dr. Ben Juurlink received the M.Sc. degree from Utrecht University, Utrecht, The Netherlands, and the Ph.D. degree from Leiden University, Leiden, The Netherlands, in 1992 and 1997, respectively.

In 1997-1998 he worked as a post-doctoral researcher at the Heinz Nixdorf Institute in Paderborn, Germany, and from 1998 to 2009 he was a faculty member (first assistant professor, then associate professor) of the Computer Engineering Laboratory of Delft University of Technology, Delft, The Netherlands. Currently, he is professor for Embedded Systems Architectures in the Faculty of Electrical Engineering and Computer Science of Berlin University of Technology, Berlin, Germany. He is also co-founder of Spin Digital GmbH.

Dr. Juurlink’s research interests include multi- and many-core processors, reconfigurable computing, and the art of mapping applications effectively and efficiently to computer architectures. He has (co-)authored more than 130 articles in international conferences and journals, and received best paper awards at the IASTED International Conference on Parallel and Distributed Computing and Systems (PDCS) in 2002, and at the third IEEE International Conference on Consumer Electronics – Berlin (ICCE-Berlin). He has also received a Technology Transfer Award from the HiPEAC Network of Excellence for transferring some of the video coding technology that has been developed in his group to a Greece-based SME.

Dr. Juurlink is a senior member of the ACM and a senior member of the IEEE. He has been the Principal Investigator of several national research projects, Work Package leader in several European projects, and Coordinator of the EU projects LPGPU, Film265, and LPGPU2. He has served on many program committees, is an editor of the Elsevier journal on Microprocessors and Microsystems: Embedded Hardware Design, and was the general co-chair of the HiPEAC conference in 2013.

Professional Experience

Professor for Embedded Systems Architectures

Berlin University of Technology, Germany

01/2010 -

Associate professor

Delft University of Technology, Netherlands

02/2007 - 12/2009

Director of education for master's programs in Computer Engineering and Embedded Systems

Delft University of Technology, Netherlands

09/2006 - 12/2009

Assistant professor

Delft University of Technology, Netherlands

09/1999 - 01/2007

Postdoctoral fellow

Delft University of Technology, Netherlands

09/1998 - 08/1999

Postdoctoral fellow

Paderborn University, Germany

01/1997 - 07/1998

Postdoctoral fellow

Leiden University, Netherlands

09/1996 - 12/1996

Visiting researcher

Max-Planck-Institut für Informatik, Saarbrücken, Germany


Research assistant

Leiden University, Netherlands

09/1992 - 08/1996

Teaching assistant

Utrecht University, Netherlands

09/1990 - 01/1992


PhD degree in computer science

Leiden University, Netherlands. Thesis title: Computational models for parallel computers


MSc degree in computer science

Utrecht University, Netherlands



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Nadjib Mammeri and Ben Juurlink (2018). VComputeBench: A Vulkan Benchmark Suite for GPGPU on Mobile and Embedded GPUs [12]. 2018 IEEE International Symposium on Workload Characterization (IISWC). IEEE.

Sohan Lal and Jan Lucas and Ben Juurlink (2019). SLC: Memory Access Granularity Aware Selective Lossy Compression for GPUs [13]. Proc. IEEE Int. Conf on Design Automation, and Test in Europe,(DATE)

Daniel Maier, Nadjib Mammeri, Biagio Cosenza, Ben Juurlink (2019). Approximating Memory-bound Applications on Mobile GPUs [14]. 2019 International Conference on High Performance Computing & Simulation (HPCS)

Matthias Göbel and Kai Norman Clasen and Robert Drehmel and Ben Juurlink (2019). Evaluating the Memory Architecture of Next-Generation FPGA-SoCs for HPC [15]. Proceedings of the 17th International Conference on High Performance Computing & Simulation (HPCS 2019). Nominee for Outstanding Paper Award.

Robert Drehmel and Matthias Göbel and Ben Juurlink (2019). A Quantitative Analysis of Processor Memory Bandwidth of an FPGA-MPSoC [16]. Proceedings of the 28th Workshop on Parallel Algorithms, Parallel Computer Structures and Parallel System Software (PARS 2019)

Farzaneh Salehiminapour and Jan Lucas and Matthias Göbel and Ben Juurlink (2019). Reducing DRAM Accesses through Pseudo-Channel Mode [17]. Proceedings of the 28th Workshop on Parallel Algorithms, Parallel Computer Structures and Parallel System Software (PARS 2019). Best Student Paper Award.

Mohammad Loni and Ali Zoljodi and Daniel Maier and Amin Majd and Masoud Daneshtalab and Mikael Sjödin and Ben Juurlink and Reza Akbari (2020). DenseDisp: Resource-Aware Disparity Map Estimation by Compressing Siamese Neural Architecture [18]. IEEE World Congress On Computational Intelligence (WCCI) 2020

Daniel Maier and Biagio Cosenza and Ben Juurlink (2021). ALONA: Automatic Loop Nest Approximation with Reconstruction and Space Pruning [19]. Euro-Par 2021: Parallel Processing. Springer International Publishing, 3–18.

Thomas Hartenstein and Daniel Maier and Biagio Cosenza and Ben Juurlink (2019,). Memory-aware Weight Pruning for Deep Neural Networks. [20]. PARS-Mitteilungen, (to appear)

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Older Publications

Further Publications of Prof. Juurlink  are here [28]available.

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