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TU Berlin

Inhalt des Dokuments

Matthias Göbel

Contact

information
Room:
E-N 648
Tel.:
+49 (0)30 314-27724
E-Mail

Office hours:
On request

Address:
Sekretariat EN 12
Einsteinufer 17
D-10587 Berlin

Research

  • Embedded Systems
  • High-Performance Computing
  • Digital Hardware Design
  • Tools and Methodologies for Hardware/Software-Codesign
  • Memory Bandwidth Prediction and Optimization
  • Energy-Aware Computing

Awards

  • Best Student Paper Award (Nachwuchspreis) for "Reducing DRAM Accesses through Pseudo-Channel Mode" at PARS 2019
  • Best Paper Award for "A Quantitative Analysis of the Memory Architecture of FPGA-SoCs" at ARC 2017
  • HiPEAC Paper Award for "High Performance Memory Accesses on FPGA-SoCs: A Quantitative Analysis" at FCCM 2015

Publications

A Quantitative Analysis of the Memory Architecture of FPGA-SoCs
Citation key Göbel2017
Author Matthias Göbel and Ahmed Elhossini and Chi Ching Chi and Mauricio Alvarez-Mesa and Ben Juurlink
Title of Book Proceedings of the 13th International Symposium on Applied Reconfigurable Computing (ARC 2017)
Year 2017
ISBN 978-3-319-56258-2
DOI 10.1007/978-3-319-56258-2_21
Address Cham
Editor Wong, Stephan and Beck, Antonio Carlos and Bertels, Koen and Carro, Luigi
Publisher Best Paper Award winner
Link to publication Download Bibtex entry

Supervised Theses

Supervised Theses
Design and Implementation of an FPGA-based Optical QAM Receiver for Real-Time Applications
Björn Böttcher
Design and Implementation of a Real-Time Tracking System for Free-Space Optical Communication
Konstantinos Vasiliou
Speichervirtualisierung und -verwaltung für FPGA-SoCs
Ilja Behnke
A Generic Userspace Hardware Abstraction Layer for Linux SoCs
Uffke Drechsler
Evaluating the Memory Architecture of the Zynq Ultrascale+ FPGA-SoC
Kai Norman Clasen
Power Modelling for FPGA Design Space Exploration
Nils Schubert

 

 

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