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Contact
| Room: | E-N
636 |
|---|---|
| Tel.: | +49
(0)30 314-24294 |
| E-Mail | javad
[1] |
| Address: | Sekretariat
N 12 Einsteinufer 17 D-10587 Berlin |
Biography
Javad Bahrami received his B.Sc. from
Iran University of Science and Technology (IUST) and his M.Sc. from
University of Tehran, both in Electrical Engineering. He worked as a
research assistant at University of Tehran since 2016, and during this
period of time, his task was helping undergraduate students to solve
their problems regarding their implementations on FPGAs by using
Hardware Description Languages (HDLs). Since April 1, 2019, he joined
the Embedded System Architecture (AES) group as a researcher. His
research interests are FPGAs, Computer Architecture, Low-Power Circuit
Design, and Parallel Programming on GPUs, to name but a
few.
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