TU Berlin

Embedded Systems ArchitectureÁlvarez Mesa, Mauricio

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Mauricio Álvarez Mesa

Contact

Contact information
Room:
E-N 601/602
Tel.:
+49 (0)30 314-21357
Fax:
+49 (0)30 314-22943
E-Mail

Office hours:
with appointment
Address:
Sekretariat EN 12
Einsteinufer 17
D-10587 Berlin

Teaching

Publications

Biao Wang and Mauricio Alvarez-Mesa and Chi Ching Chi and Ben Juurlink (2015). Parallel H.264/AVC Motion Compensation for GPUs Using OpenCL. IEEE Transactions on Circuits and Systems for Video Technology, 525-531.


Biao Wang and Mauricio Alvarez-Mesa and Chi Ching Chi and Ben Juurlink (2013). An Optimized Parallel IDCT on Graphics Processing Units. Euro-Par 2012: Parallel Processing Workshops. Springer Berlin Heidelberg, 155-164.


Sergio Sanz-Rodríguez and Tobias Mayer and Mauricio Alvarez-Mesa and Thomas Schierl (2013). A Low-Complexity Parallel-Friendly Rate Control Algorithm for Ultra-Low Delay High Definition Video Coding. Multimedia and Expo Workshops (ICMEW), 2013 IEEE International Conference on, 1-4.


Sergio Sanz-Rodríguez and Mauricio Alvarez-Mesa and Tobias Mayer and Thomas Schierl (2015). A Parallel H.264/SVC Encoder for High Definition Video Conferencing. Signal Processing: Image Communication, 89 - 106.


Chi Ching Chi and Mauricio Alvarez-Mesa and Ben Juurlink (2015). Low-Power High-Efficiency Video Decoding Using General-Purpose Processors. ACM Transaction on Architecture and Code Optimization. ACM, 56:1–56:25.


Chi Ching Chi and Mauricio Alvarez-Mesa and Benjamin Bross and Ben Juurlink and Thomas Schierl (2015). SIMD Acceleration for HEVC Decoding. IEEE Transactions on Circuits and Systems for Video Technology, 841-855.


Michael Andersch and Jan Lucas and Mauricio Alvarez-Mesa and Ben Juurlink (2015). On Latency in GPU Throughput Microarchitectures. Proc. IEEE Int. Symposium on Performance Analysis of Systems and Software (ISPASS), 169-170.


Matthias Göbel and Chi Ching Chi and Mauricio Alvarez-Mesa and Ben Juurlink (2015). High Performance Memory Accesses on FPGA-SoCs: A Quantitative Analysis. Proceedings of the 23rd IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM 2015). HiPEAC Paper Award.


Jan Lucas and Michael Andersch and Mauricio Alvarez-Mesa and Ben Juurlink (2015). Spatiotemporal SIMT and Scalarization for Improving GPU Efficiency. ACM Trans. Archit. Code Optim.. ACM, 32:1–32:26.


Gabriel Cebrian Marquez and Chi Ching Chi and Jose Luis Martinez and Pedro Cuenca and Mauricio Alvarez Mesa and Sergio Sanz-Rodriguez and Ben Juurlink (2015). Reducing HEVC Encoding Complexity Using Two-Stage Motion Estimation. Visual Communications and Image Processing, VCIP


Philipp Habermann, Chi Ching Chi, Mauricio Alvarez-Mesa, Ben Juurlink (2015). Optimizing HEVC CABAC Decoding with a Context Model Cache and Application-specific Prefetching. Proceedings of the 11th IEEE International Symposium on Multimedia (ISM 2015), 429-434.


Philipp Habermann and Chi Ching Chi and Mauricio Alvarez-Mesa and Ben Juurlink (2017). Application-specific Cache and Prefetching for HEVC CABAC Decoding. IEEE Multimedia, Volume 24, Issue 1, Jan.-Mar. 2017, 72-85.


Biao Wang and Diego F. de Souza and Mauricio Alvarez-Mesa and Chi Ching Chi and Ben Juurlink and Aleksandar Ilic and Nuno Roma and Leonel Sousa (2017). GPU Parallelization of HEVC In-Loop Filters. International Journal of Parallel Programming, 1–21.


Biao Wang and Diego F. de Souza and Mauricio Alvarez-Mesa and Chi Ching Chi and Ben Juurlink and Aleksandar Ilic and Nuno Roma and Leonel Sousa (2016). Efficient HEVC decoder for heterogeneous CPU with GPU systems. 2016 IEEE 18th International Workshop on Multimedia Signal Processing (MMSP), 1-6.


Matthias Göbel and Ahmed Elhossini and Chi Ching Chi and Mauricio Alvarez-Mesa and Ben Juurlink (2017). A Quantitative Analysis of the Memory Architecture of FPGA-SoCs. Proceedings of the 13th International Symposium on Applied Reconfigurable Computing (ARC 2017). Best Paper Award winner.


Biography

Lupe

Mauricio Alvarez Mesa is currently a postdoctoral researcher at the Embedded Systems Architecture group at TU Berlin. He received the MSc degree in Electronic Engineering in 2000 from University of Antioquia, Medellin, Colombia, and the PhD degree in Computer Science in 2011 from Universitat Politècnica de Catalunya (UPC), Barcelona, Spain. From 2006 to 2011 he was an adjunct lecturer at UPC. He was a summer intern at IBM Haifa Research labs, Israel in 2007, and a research visitor at Technische Universität Berlin (TU Berlin), Berlin, Germany in 2011. From 2012 to 2013 he was a research associate at the Multimedia Communications group of Fraunhofer Institute HHI in Berlin. At TU Berlin he is currently leading the LPGPU European project and the High Performance Video Coding research line. He has co-authored more than 20 publications in the field of video coding, parallel computing and computer architecture.

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