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TU Berlin

Inhalt des Dokuments

Mauricio Álvarez Mesa

Contact

Contact information
Room:
E-N 601/602
Tel.:
+49 (0)30 314-21357
Fax:
+49 (0)30 314-22943
E-Mail

Office hours:
with appointment
Address:
Sekretariat EN 12
Einsteinufer 17
D-10587 Berlin

Teaching

Publications

Michael Andersch and Jan Lucas and Mauricio Alvarez-Mesa and Ben Juurlink (2015). On Latency in GPU Throughput Microarchitectures. Proc. IEEE Int. Symposium on Performance Analysis of Systems and Software (ISPASS), 169-170.


Michael Andersch and Jan Lucas and Mauricio Alvarez-Mesa and Ben Juurlink (2014). Analyzing GPGPU Pipeline Latency. Proc. 10th Int. Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems, Fiuggi, Italy (ACACES' 14)


Arnaldo Azevedo and Ben Juurlink and Cor Meenderinck and Andrei Terechko and Jan Hoogerbrugge and Mauricio Alvarez Mesa and Alex Ramírez and Mateo Valero (2011). A Highly Scalable Parallel Implementation of H.264. Transactions on High-Performance Embedded Architectures and Compilers IV. Springer Berlin Heidelberg, 111-134.


Benjamin Bross and Mauricio Alvarez-Mesa and Valeri George and Chi Ching Chi and Tobias Mayer and Ben Juurlink and Thomas Schierl (2013). HEVC Real-time Decoding. Proc. SPIE. Applications of Digital Image Processing XXXVI, 88561R-88561R-11.


Benjamin Bross and Valeri George and Mauricio Alvarez-Mesa and Tobias Mayer and Chi Ching Chi and Jens Brandenburg and Thomas Schierl and Detlev Marpe and Ben Juurlink (2013). HEVC Performance and Complexity for 4K Video. Proc. Third IEEE Int. Conf. on Consumer Electronics - Berlin (ICCE-Berlin), 44-47.


Jerónimo Castrillón and Lothar Thiele and Lars Schor and Weihua Sheng and Ben H. H. Juurlink and Mauricio Alvarez Mesa and Angela Pohl and Ralph Jessenberger and Victor Reyes and Rainer Leupers (2015). Multi/many-core programming: where are we standing?. Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, DATE 2015, Grenoble, France, March 9-13, 2015, 1708–1717.


Chi Ching Chi and Mauricio Alvarez Mesa and Ben Juurlink and Clare, G. and Henry, F. and Pateux, S. and Schierl, T. (2012). Parallel Scalability and Efficiency of HEVC Parallelization Approaches. IEEE Transactions on Circuits and Systems for Video Technology


Chi Ching Chi and Mauricio Alvarez-Mesa and Ben Juurlink (2015). Low-Power High-Efficiency Video Decoding Using General-Purpose Processors. ACM Transaction on Architecture and Code Optimization. ACM, 56:1–56:25.


Chi Ching Chi and Mauricio Alvarez-Mesa and Benjamin Bross and Ben Juurlink and Thomas Schierl (2015). SIMD Acceleration for HEVC Decoding. IEEE Transactions on Circuits and Systems for Video Technology, 841-855.


Chi Ching Chi and Mauricio Alvarez-Mesa and Jan Lucas and Ben Juurlink and T. Schierl (2013). Parallel HEVC Decoding on Multi- and Many-core Architectures. A Power and Performance Analysis.. Journal of Signal Processing Systems


Chi Ching Chi and Mauricio Alvarez Mesa and Ben Juurlink and V. George and T. Schierl (2013). Improving the Parallelization Efficiency of HEVC Decoding. Proceedings of the 2012 International Conference on Image Processing (ICIP)


Matthias Göbel and Ahmed Elhossini and Chi Ching Chi and Mauricio Alvarez-Mesa and Ben Juurlink (2017). A Quantitative Analysis of the Memory Architecture of FPGA-SoCs. Proceedings of the 13th International Symposium on Applied Reconfigurable Computing (ARC 2017). Best Paper Award winner.


Matthias Göbel and Chi Ching Chi and Mauricio Alvarez-Mesa and Ben Juurlink (2015). High Performance Memory Accesses on FPGA-SoCs: A Quantitative Analysis. Proceedings of the 23rd IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM 2015). HiPEAC Paper Award.


Philipp Habermann and Chi Ching Chi and Mauricio Alvarez-Mesa and Ben Juurlink (2017). Application-specific Cache and Prefetching for HEVC CABAC Decoding. IEEE Multimedia, Volume 24, Issue 1, Jan.-Mar. 2017, 72-85.


Philipp Habermann and Chi Ching Chi and Mauricio Alvarez-Mesa and Ben Juurlink (2017). Improved Wavefront Parallel Processing for HEVC Decoding. Proceedings of the 13th International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems (ACACES 2017), 253-256.


Biography

Lupe

Mauricio Alvarez Mesa is currently a postdoctoral researcher at the Embedded Systems Architecture group at TU Berlin. He received the MSc degree in Electronic Engineering in 2000 from University of Antioquia, Medellin, Colombia, and the PhD degree in Computer Science in 2011 from Universitat Politècnica de Catalunya (UPC), Barcelona, Spain. From 2006 to 2011 he was an adjunct lecturer at UPC. He was a summer intern at IBM Haifa Research labs, Israel in 2007, and a research visitor at Technische Universität Berlin (TU Berlin), Berlin, Germany in 2011. From 2012 to 2013 he was a research associate at the Multimedia Communications group of Fraunhofer Institute HHI in Berlin. At TU Berlin he is currently leading the LPGPU European project and the High Performance Video Coding research line. He has co-authored more than 20 publications in the field of video coding, parallel computing and computer architecture.

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