TU Berlin

Embedded Systems ArchitectureSynZEN

AES Logo

Page Content

to Navigation

Free configurable VLIW/TTA Hybrid Architecture



Very Long Instruction Word (VLIW) and so-called Transport Triggered Architectures (TTA) are potentially simpler and hence more power-efficient than superscalar architectures since they do not need hardware to detect instruction-level parallelism. We have developed an FPGA-prototype of a hybrid VLIW/TTA architecture named SynZEN. It consists of a customizable set of functional units (FUs) with associated register files and a customizable interconnection network between the FUs. SynZEN is less complex than a VLIW architecture because the register file is fully distributed while in a VLIW several or all FUs share a register file. It is less complex than a TTA architecture because data out of a local register files can be used instead of a transportation step throw the network . The goal of this project is to extend the SynZEN architecture with several features such as caches and to develop compiler support for it. Furthermore, we intend to investigate how the SynZEN architecture can be deployed as an ILP accelerator in heterogeneous multicores.

People involved


Entwurf eines generischen, applikationsspezifischen,transportgesteuerten Prozessor-Modells in VHDL und Validierung auf einem FPGA
Citation key Ha:synZEN:2010
Author Stefan Hauser
Title of Book Informatiktage 2010, Fachwissenschaftlicher Informatik-Kongress
Pages 169 – 172
Year 2010
ISBN 978-3-88579-443-1
Month mar
Publisher Gesellschaft für Informatik
Series Lecture Notes in Informatics
Link to publication Download Bibtex entry


Quick Access

Schnellnavigation zur Seite über Nummerneingabe