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Free configurable VLIW/TTA Hybrid Architecture

Description

Lupe [1]
© synzen

Very Long Instruction Word (VLIW) and so-called Transport Triggered Architectures (TTA) are potentially simpler and hence more power-efficient than superscalar architectures since they do not need hardware to detect instruction-level parallelism. We have developed an FPGA-prototype of a hybrid VLIW/TTA architecture named SynZEN. It consists of a customizable set of functional units (FUs) with associated register files and a customizable interconnection network between the FUs. SynZEN is less complex than a VLIW architecture because the register file is fully distributed while in a VLIW several or all FUs share a register file. It is less complex than a TTA architecture because data out of a local register files can be used instead of a transportation step throw the network . The goal of this project is to extend the SynZEN architecture with several features such as caches and to develop compiler support for it. Furthermore, we intend to investigate how the SynZEN architecture can be deployed as an ILP accelerator in heterogeneous multicores.

People involved

  • Stefan Hauser
  • Nico Moser
  • Carsten Gremzow
  • Prof. Dr. Ben Juurlink [2]
  • Fabian Schulz
  • Marcus Mikulcak
  • Ahmed Elhossini [3]

Publications

Nico Moser and Stefan Hauser and Carsten Gremzow (2009). Reduzierung der Kommunikation in TTA-Verbindungsnetzen mittels Laufzeitanalyse [4]. Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen. Nico Moser, 107–116.

Nico Moser and Stefan Hauser and Carsten Gremzow (2010). A Hybrid Transport/Control Operation Triggered Architecture [5]. Workshop on Parallel Systems and Algorithms (PARS 2010) at ARCS 2010 - Architecture of Computing Systems, 121 – 125.

Stefan Hauser (2010). Entwurf eines generischen, applikationsspezifischen,transportgesteuerten Prozessor-Modells in VHDL und Validierung auf einem FPGA [6]. Informatiktage 2010, Fachwissenschaftlicher Informatik-Kongress. Gesellschaft für Informatik, 169 – 172.

Stefan Hauser and Nico Moser and Carsten Gremzow and Ben Juurlink (2010). Transport Triggered Interconnection Network for a Scalable Application-Specific Processor [7]. ACACES 2010 - Poster Abstracts. High Performance and Embedded Architecture and Compilation, 155–158.

Stefan Hauser and Nico Moser and Ben Juurlink (2012). SynZEN: A Hybrid TTA/VLIW Architecture with a Distributed Register File [8]. NORCHIP

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