direkt zum Inhalt springen

direkt zum Hauptnavigationsmenü

Sie sind hier

TU Berlin

Page Content

AES Project

This project is not available in SS2011.

Course information
AES Project (Project Embedded Systems Architectures)
Course Id:
0433 L 231
4 SWS / 6 ECTS
Module description:
Study courses:
Technische Informatik, Informatik, etc.
Wed 10-14 o'clock, weekly, from 20.10.2010 to 16.2.2011
aep@aes.cs.tu-berlin.de oder

A given VHDL code of an embedded system (32-Bit RISC processor, memory, UART, etc.) will be optimized and enhanced under certain criterias.

  • CPU performance optimization: Optimizing the processor description, the throughput or the frequency will be raised; from multi-cycle to pipeline architecture
  • System structure optimization: Identification and removal of bottle necks; implementation or integration of normative components
  • Enhancement of documentation and quality: improving the code structure and implementation
  • Software development close to given hardware: Boot-leader/bootstrap development or customization; development of test programs

Course of Events

  • short introduction at the beginning
  • Allocation into groups (too less students: only one team will be grouped)
  • time for analysis; planning the deeds
  • weekly short report about the reached last weeks aims and determing the aims for the next week
  • ending presentation, consultation and code discussion at the end of the semester


Literature of  CPU and system architecture

  • Computer Organization & Design bzw. Recherorganisation und -entwurf (David A. Patterson, John L. Patterson)
  • MIPS RISC Architecture (Gerry Kane, Joe Heinrich)
  • Mikroprozessortechnik und Rechnerstrukturen (Thomas Flik)
  • Moderne Prozessorarchitekturen (Matthias Menge)


  • The Designer’s Guide to VHDL (Peter J. Ashenden)
  • VHDL-Cookbook (Peter J. Ashenden)
  • VHDL-Kompakt (Andreas Mäder)

Zusatzinformationen / Extras

Quick Access:

Schnellnavigation zur Seite über Nummerneingabe