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Welcome at AES

Lupe [1]

The Embedded Systems Architecture (Architektur eingebetteter Systeme, AES) group investigates and teaches the field of computer architecture, ranging from low-power embedded systems to massively parallel high-performance systems. We focus on the design, implementation and optimization of high performance embedded systems; taking into account the interactions between applications, tools, and architectures. In addition to high performance we also aim at improving energy efficiency, programmability, predictability, error resilience, as well as other features of emerging computer systems.

Above is a picture of the AES Team.  From left to right: Anastasiia Dolinina, Farzaneh Salehiminapour, Robert Drehmel, Biagio Cosenza, Sohan Lal, Adela Westedt, Daniel Maier, Ben Juurlink, Matthias Göbel, Kaijie Fan, Nadjib Mammeri, Sara Tennstedt, Angela Pohl and Philipp Habermann.

News

22.01.2019: Ben Juurlink attends two events in Valencia.

Lupe [2]

Prof. Juurlink flies to Valencia on Tuesday for two events. First, he is an Advisory Board member of the EU H2020 Projekt Tulipp [3] and he will attend their final workshop/tutorial. Second, he will give an interview about the LPGPU2 [4] project to Madeleine Gray of the HiPEAC Network of Excellence.


19.12.2018: Sohan Lal PC member of SummerSim'19.

Lupe [5]

Sohan Lal has been invited to serve as a technical program committee member of the System Design Flow (SDF) track of 2019 Summer Simulation Conference (SummerSim'19) to be held from July 22-24 at Technical University of Berlin, Germany. The conference website and call for papers can be found at: http://scs.org/summersim/ [6]

10.12.18: Recap of Prof. Corporaal visiting AES.

Lupe [7]

On Friday, September 7th, Prof. Henk Corporaal from the Embedded Systems Architectures group of  the Eindhoven University of Technology visited AES at TU Berlin.

Prof. Corporaal presented his work on accelerator architectures for Deep Learning. He covered the state-of-the-art in networks and accelerators. Prof. Corporaal also highlighted the important challenges for accelerator designs and code generation.

The talk was very well received. Besides the AES team members also members of other groups (SESE, BIGDAMA, DIMA and CV) at TU Berlin attended the event.

Afterwards, a cluster meeting was held, where deep learning accelerators and compiler technology was discussed.

More news can be found here [8].

Current Projects [9]

  • CELERITY [10]
  • LPGPU2 [11]
  • Reconfigurable Computing [12]
  • High Performance Video Coding [13]
more to: Current Projects [14]

Courses in WS 18/19 [15]

  • Rechnerorganisation Praktikum [16]
  • Rechnerorganisation (VL + Üb) [17]
  • Multicore Systems (VL + Üb) [18]
  • Recent Advances in Computer Architecture [19]
  • AES Bachelor Project [20]
  • Compiler Design (VL + Üb) [21]

  • F&A Mündliche Prüfung Rechnerorganisation [22]
more to: Courses in WS 18/19 [23]

Group Chair

Prof. Dr. Ben Juurlink
+49.30.314-73130/73131
Room E-N 642

The advice is made by appointment. You can arrange a personal or telephone appointment via our secretary.

Secretary's office

Sara Tennstedt
sec. EN 12
Room E-N 645
+49.30.314-73130
e-mail query [24]
Drop-In Hours:
Tue 10-12, Thu 12-14
or by appointment

Postal address

Technische Universität Berlin
Architektur eingebetteter Systeme
sec. EN 12
Einsteinufer 17 -6. OG
10587 Berlin

  • AES Flyer [25]
  • F&A Mündliche Prüfung Rechnerorganisation [26]
  • Recognition of followed courses for Computer Organization [27]
  • Vorlesungsverzeichnis [28]
  • tubIT Accounts [29]
  • Moseskonto [30]
  • ISIS-Zugang [31]

[32]

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