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Inhalt des Dokuments

Welcome at AES

Lupe

The Embedded Systems Architecture (Architektur eingebetteter Systeme, AES) group investigates and teaches the field of computer architecture, ranging from low-power embedded systems to massively parallel high-performance systems. We focus on the design, implementation and optimization of high performance embedded systems; taking into account the interactions between applications, tools, and architectures. In addition to high performance we also aim at improving energy efficiency, programmability, predictability, error resilience, as well as other features of emerging computer systems.

Above is a picture of the AES Team.  From left to right: Anastasiia Dolinina, Farzaneh Salehiminapour, Robert Drehmel, Biagio Cosenza, Sohan Lal, Adela Westedt, Daniel Maier, Ben Juurlink, Matthias Göbel, Kaijie Fan, Nadjib Mammeri, Sara Tennstedt, Angela Pohl and Philipp Habermann.

News

10.12.18: Recap of Prof. Corporaal visiting AES.

Lupe

On Friday, September 7th, Prof. Henk Corporaal from the Embedded Systems Architectures group of  the Eindhoven University of Technology visited AES at TU Berlin.

Prof. Corporaal presented his work on accelerator architectures for Deep Learning. He covered the state-of-the-art in networks and accelerators. Prof. Corporaal also highlighted the important challenges for accelerator designs and code generation.

The talk was very well received. Besides the AES team members also members of other groups (SESE, BIGDAMA, DIMA and CV) at TU Berlin attended the event.

Afterwards, a cluster meeting was held, where deep learning accelerators and compiler technology was discussed.

07.12.2018: Jan Lucas successfully completed his PhD defense.

Lupe

Dipl.-Ing. Jan Lucas successfully completed his PhD defense on Friday 7th December 2018. His thesis title was: "GPU Power Modeling and Architectural Enhancements for GPU Energy Efficiency”.
Congratulation Dr. Lucas for your success and we wish you the best in your future!

9.12.2018: Insights of Prof. Lawrence Rauchwerger Research Visit.

Lupe

Prof. Dr. Lawrence Rauchwerger visited the AES group at TU Berlin from 22nd to 24th of November. On Thursday 22nd, he gave the presentation "Two Roads to Parallelism: Compilers and Libraries". Rauchwerger highlighted the importance of productivity in the context of parallel software and showed different approaches to reach it on modern parallel architectures. He presented two interesting examples: the Hybrid Analysis compiler framework, which seamlessly integrates static and run-time analysis of memory references into a single framework capable of full automatic loop level parallelization; and the SAPL library, which is a collection of generic data structures and algorithms that provides a high productivity and is the parallel programming infrastructure analogous to the C++ Standard Template Library. The event was open and many people attended his presentation from different groups, including research staff from MSD, DIMA and AES groups. After the presentation, Prof. Rauchwerger joined two round-tables organized by our group on compiler technology and computer architecture.

More news can be found here.

Zusatzinformationen / Extras

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Auxiliary Functions

Group Chair

Prof. Dr. Ben Juurlink
+49.30.314-73130/73131
Room E-N 642

Secretary's office

Sara Tennstedt
sec. EN 12
Room E-N 645
+49.30.314-73130

Drop-In Hours:
Tue 10-12, Thu 12-14
or by appointment

Postal address

Technische Universität Berlin
Architektur eingebetteter Systeme
sec. EN 12
Einsteinufer 17 -6. OG
10587 Berlin