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Inhalt des Dokuments

Ältere Publikationen

  • B.H.H. Juurlink, M. Alvarez, C.C. Chi, A. Azevedo, C.H. Meenderinck, A. Ramirez, Scalable Parallel Programming Applied to H.264/AVC Decoding [1] (June 2012), Published by Springer [Book]
  • J.A. Ambrose, A.M. Molnos, A.T. Nelson, S.D. Cotofana, K.G.W. Goossens, B.H.H. Juurlink, Composable Local Memory Organisation for Streaming Applications on Embedded MPSoCs [2] (May 2011), ACM International Conference on Computing Frontiers (CF 2011), 3-5 May 2011, Ischia, Italy [Conference Paper]
  • A. Azevedo, B.H.H. Juurlink, An Instruction to Accelerate Software Caches [3] (February 2011), Architecture of Computing Systems (ARCS 2011), 22-25 February 2011, Como, Italy [Conference Paper]
  • A. Azevedo, B.H.H. Juurlink, A Multidimensional Software Cache for Scratchpad-Based Systems [4] (December 2010), International Journal of Embedded and Real-Time Communication Systems (IJERTCS), volume 1, issue 4 [Journal Paper]
  • A. Ramirez, F. Cabarcas, B.H.H. Juurlink, M. Alvarez, F. Sanchez, A. Azevedo, C.H. Meenderinck, C.B. Ciobanu, S. Isaza Ramirez, G.N. Gaydadjiev, The SARC Architecture [5] (October 2010), IEEE Micro, volume 30, issue 5 , Special Issue on European Multicore Processing Projects [Journal Paper]
  • C.H. Meenderinck, B.H.H. Juurlink, A Case for Hardware Task Management Support for the StarSS Programming Model [6] (September 2010), Conference on Digital System Design Architectures, Methods and Tools (DSD 2010), 1-3 September 2010, Lille, France [Conference Paper]
  • M. Briejer, C.H. Meenderinck, B.H.H. Juurlink, Extending the Cell SPE with Energy Efficient Branch Prediction [7](September 2010), Euro-Par 2010, 31 August - 3 September 2010, Naples, Italy [Conference Paper]
  • C.C. Chi, B.H.H. Juurlink, C.H. Meenderinck, Evaluation of Parallel H.264 Decoding Strategies for the Cell Broadband Engine [8](June 2010), 24th International Conference on Supercomputing (ICS 2010), 1-4 June 2010, Tsukuba, Japan [Conference Paper]
  • D. Borodin, B.H.H. Juurlink, Protective Redundancy Overhead Reduction Using Instruction Vulnerability Factor [9](May 2010), ACM International Conference on Computing Frontiers (CF 2010), 17-19 May 2010, Bertinoro, Italy [Conference Paper]
  • D. Borodin, B.H.H. Juurlink, Instruction Precomputation with Memoization for Fault Detection [10](March 2010), Design, Automation and Test in Europe (DATE 2010), 8-12 March 2010, Dresden, Germany [Conference Paper]
  • M. Alvarez, A. Ramirez, A. Azevedo, C.H. Meenderinck, B.H.H. Juurlink, M. Valero, Scalability of Macroblock-level Parallelism for H.264 Decoding [11](December 2009), 15th International Conference on Parallel and Distributed Systems (ICPADS 2009), 8-11 December 2009, Shenzhen, China [Conference Paper]
  • M. Briejer, C.H. Meenderinck, B.H.H. Juurlink, Energy Efficient Branch Prediction on the Cell SPE [12] (November 2009), 20th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2009), 26-27 November 2009, Veldhoven, The Netherlands [Conference Paper]
  • G.J.M. Smit, G.F. van der Hoeven, J.F. Groote, R.H.J.M. Otten, H. Tonino, B.H.H. Juurlink, B.R.H.M. Haverkort, The 3TU embedded systems master in the Netherlands [13](October 2009), Workshop on Embedded Systems Education (WESE 2009), 15 October 2009, Grenoble, France [Conference Paper]
  • C.H. Meenderinck, B.H.H. Juurlink, Intra-Vector SIMD Instructions for Core Specialization [14](October 2009), 27th International Conference on Computer Design (ICCD 2009), 4-7 October 2009, Lake Tahoe, USA [Conference Paper]
  • A. Azevedo, B.H.H. Juurlink, An Efficient Software Cache for H.264 Motion Compensation [15](October 2009), International Symposium on System-on-Chip (SOC 2009), 5-7 October 2009, Tampere, Finland [Conference Paper]
  • D. Borodin, B.H.H. Juurlink, S. Hamdioui, S. Vassiliadis, Instruction-Level Fault Tolerance Configurability [16](October 2009), Journal of Signal Processing Systems (JSPS), volume 57, issue 1 [Journal Paper]
  • A. Azevedo, B.H.H. Juurlink, C.H. Meenderinck, A. Terechko, J. Hoogerbrugge, M. Alvarez, A. Ramirez, M. Valero, A Highly Scalable Parallel Implementation of H.264 [17](September 2009), Transactions on High-Performance Embedded Architectures and Compilers (HiPEAC), volume 4, issue 2 [Journal Paper]
  • A. Shahbahrami, B.H.H. Juurlink, SIMD Architectural Enhancements to Improve the Performance of the 2D Discrete Wavelet Transform [18](August 2009), 12th Euromicro Conference on Digital System Design, Architectures, Methods and Tools (DSD 2009), 27-29 August 2009, Patras, Greece [Conference Paper]
  • A. Shahbahrami, B.H.H. Juurlink, Performance Improvement of Multimedia Kernels by Alleviating Overhead Instructions on SIMD Devices [19](August 2009), 8th International Symposium on Advanced Parallel Processing Technologies (APPT 2009), 24-25 August 2009, Rapperswil, Switzerland [Conference Paper]
  • D. Borodin, B.H.H. Juurlink, S. Kaxiras, Instruction Precomputation for Fault Detection [20] (August 2009), 12th Euromicro Conference on Digital System Design, Architectures, Methods and Tools (DSD 2009), 27-29 August 2009, Patras, Greece [Conference Paper]
  • C.H. Meenderinck, A. Azevedo, B.H.H. Juurlink, M. Alvarez, A. Ramirez, Parallel Scalability of Video Decoders [21] (August 2009), Journal of Signal Processing Systems (JSPS), volume 57, issue 2 [Journal Paper]
  • A. Azevedo, B.H.H. Juurlink, Scalar Processing Overhead on SIMD-Only Architectures [22] (July 2009), 20th IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP 2009), 7-9 July 2009, Boston, USA [Conference Paper]
  • C.H. Meenderinck, B.H.H. Juurlink, Specialization of the Cell SPE for Media Applications [23] (July 2009), 20th IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP 2009), 7-9 July 2009, Boston, USA [Conference Paper]
  • M. Alvarez, A. Ramirez, M. Valero, A. Azevedo, C.H. Meenderinck, B.H.H. Juurlink, Performance Evaluation of Macroblock-level Parallelization of H.264 Decoding on a cc-NUMA Multiprocessor Architecture [24](June 2009), Avances en Sistemas e Informática, volume 6, issue 1 [Journal Paper]
  • P.J. de Langen, B.H.H. Juurlink, Limiting the Number of Dirty Cache Lines [25]  (April 2009), Design, Automation and Test in Europe (DATE 2009), 20-24 April 2009, Nice, France [Conference Paper]
  • M. Alvarez, A. Ramirez, M. Valero, A. Azevedo, C.H. Meenderinck, B.H.H. Juurlink, Performance Evaluation of Macroblock-level Parallelization of H.264 Decoding on a cc-NUMA Multiprocessor Architecture [26](April 2009), 4th Colombian Computing Conference (4CCC), April 2009, Bucaramanga, Colombia [Conference Paper]
  • C.H. Meenderinck, B.H.H. Juurlink, The SARC Media Accelerator - Specialization of the Cell SPE for Media Acceleration [27] (January 2009), CE technical report [Technical Report]
  • A. Azevedo, C.H. Meenderinck, B.H.H. Juurlink, A. Terechko, J. Hoogerbrugge, M. Alvarez, A. Ramirez, M. Valero, Parallel H.264 Decoding on an Embedded Multicore Processor [28](January 2009), 4th International Conference on High Performance Embedded Architectures and Compilers (HiPEAC 2009), 25-28 January 2009, Paphos, Cyprus [Conference Paper]
  • A. Shahbahrami, B.H.H. Juurlink, Optimization of Content-Based Image Retrieval Functions [29](December 2008), 10th IEEE International Symposium on Multimedia (ISM 2008), 15-17 December 2008, Berkeley, USA [Conference Paper]
  • M. Alvarez, A. Azevedo, C.H. Meenderinck, B.H.H. Juurlink, A. Terechko, J. Hoogerbrugge, A. Ramirez, Analyzing scalability limits of H.264 decoding due to TLP overhead [30] (November 2008), 6th HiPEAC Industrial Workshop, 26 November 2008, Paris, France [Conference Paper]
  • A. Shahbahrami, D. Borodin, B.H.H. Juurlink, Comparison Between Color and Texture Features for Image Retrieval [31](November 2008), 19th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2008), 27-28 November 2008, Veldhoven, The Netherlands [Conference Paper]
  • C.H. Meenderinck, B.H.H. Juurlink, A Chip MultiProcessor Accelerator for Video Decoding [32](November 2008), 19th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2008), 27-28 November 2008, Veldhoven, The Netherlands [Conference Paper]
  • D. Borodin, B.H.H. Juurlink, A Low-Cost Cache Coherence Verification Method for Snooping Systems [33](September 2008), 11th Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2008), 3-5 September 2008, Parma, Italy [Conference Paper]
  • Z. Popovic, R. Giorgi, N. Puzovic, B.H.H. Juurlink, A. Azevedo, Analyzing Scalability of Deblocking Filter of H.264 via TLP exploitation in a new many-core architecture [34] (September 2008), 11th Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2008), 3-5 September 2008, Parma, Italy [Conference Paper]
  • C.H. Meenderinck, B.H.H. Juurlink, (When) Will CMPs hit the Power Wall? [35] (August 2008), 14th International Euro-Par Conference (Euro-Par 2008), 26-29 August 2008, Las Palmas de Gran Canaria, Spain [Conference Paper]
  • C.H. Meenderinck, B.H.H. Juurlink, (When) Will CMPs hit the Power Wall? [36](August 2008), CE technical report [Technical Report]
  • R. Giorgi, Z. Popovic, N. Puzovic, A. Azevedo, B.H.H. Juurlink, Exploiting Parallelism of Deblocking Filter of H.264 on DTA Architecture [37](July 2008), 4th International Summer School on Advanced Computer Architecture and Compilation for Embedded Systems (ACACES 2008), 13-19 July 2008, L'Aquila, Italy , ACACES Poster Abstracts [Conference Paper]
  • B.H.H. Juurlink, I. Antochi, D. Crisu, S.D. Cotofana, GRAAL: A Framework for Low-Power 3D Graphics Accelerators [38](July 2008), IEEE Computer Graphics and Applications (CGA), volume 28, issue 4 [Journal Paper]
  • P.J. de Langen, B.H.H. Juurlink, Memory Copies in Multi-Level Memory Systems [39] (July 2008), 19th IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP 2008), 2-4 July 2008, Leuven, Belgium [Conference Paper]
  • P.J. de Langen, B.H.H. Juurlink, Leakage-Aware Multiprocessor Scheduling [40](May 2008), Journal of Signal Processing Systems (JSPS), volume 57, issue 1 [Journal Paper]
  • A. Azevedo, C.H. Meenderinck, B.H.H. Juurlink, M. Alvarez, A. Ramirez, Analysis of Video Filtering on the Cell Processor [41] (May 2008), IEEE International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Seattle, USA [Conference Paper]
  • A. Shahbahrami, B.H.H. Juurlink, S. Vassiliadis, Versatility of Extended Subwords and the Matrix Register File [42](May 2008), ACM Transactions on Architecture and Code Optimization (TACO), volume 5, issue 1 [Journal Paper]
  • C.H. Meenderinck, A. Azevedo, B.H.H. Juurlink, M. Alvarez, A. Ramirez, Parallel Scalability of Video Decoders [43](April 2008), CE technical report [Technical Report]
  • A. Shahbahrami, B.H.H. Juurlink, S. Vassiliadis, Implementing the 2D Wavelet Transform on SIMD-Enhanced General-Purpose Processors [44] (January 2008), IEEE Transactions on Multimedia (TMM), volume 10, issue 1 [Journal Paper]
  • A. Shahbahrami, J.Y. Hur, B.H.H. Juurlink, S. Wong, FPGA Implementation of Parallel Histogram Computation [45](January 2008), 2nd HiPEAC Workshop on Reconfigurable Computing (WRC 2008), 27 January 2008, Göteborg, Sweden [Conference Paper]
  • C.H. Meenderinck, A. Azevedo, M. Alvarez, B.H.H. Juurlink, A. Ramirez, Parallel Scalability of H.264 [46] (January 2008), 1st Workshop on Programmability Issues for Multi-Core Computers (MULTIPROG 2008), 27 January 2008, Göteborg, Sweden [Conference Paper]
  • J. Tao, A. Shahbahrami, B.H.H. Juurlink, R. Buchty, W. Karl, S. Vassiliadis, Optimizing Cache Performance of the Discrete Wavelet Transform Using a Visualization Tool [47](December 2007), 9th IEEE International Symposium on Multimedia (ISM 2007), 10-12 December 2007, Taichung, Taiwan [Conference Paper]
  • C.M. van der Hoeven, B.H.H. Juurlink, D. Borodin, The SimpleScalar Macro Tool (SSIT)  [48] (November 2007), 18th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2007), 29-30 November 2007, Veldhoven, The Netherlands [Conference Paper]
  • A. Azevedo, C.H. Meenderinck, B.H.H. Juurlink, M. Alvarez, A. Ramirez, Analysis of Video Filtering on the Cell Processor [49] (November 2007), 18th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2007), 29-30 November 2007, Veldhoven, The Netherlands [Conference Paper]
  • A. Shahbahrami, B.H.H. Juurlink, A Comparison of Two SIMD Implementations of the 2D Discrete Wavelet Transform [50] (November 2007), 18th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2007), 29-30 November 2007, Veldhoven, The Netherlands [Conference Paper]
  • C.H. Meenderinck, B.H.H. Juurlink, (When) Will CMPs hit the Power Wall? [51](November 2007), 18th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2007), 29-30 November 2007, Veldhoven, The Netherlands [Conference Paper]
  • K.L.M. Bertels, S.D. Cotofana, G.N. Gaydadjiev, K.G.W. Goossens, S. Hamdioui, B.H.H. Juurlink, A.J. van Genderen, S. Wong, The Future of Computing, essays in memory of Stamatis Vassiliadis [52] (September 2007), Published by Computer Engineering Laboratory, TU Delft [Book]
  • A. Shahbahrami, B.H.H. Juurlink, S. Vassiliadis, SIMD Vectorization of Histogram Functions [53] (July 2007), 18th IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP 2007), 8-11 July 2007, Montréal, Canada [Conference Paper]
  • D. Borodin, B.H.H. Juurlink, S. Vassiliadis, Instruction-Level Fault Tolerance Configurability [54]  (July 2007), International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (IC-SAMOS 2007), 16-19 July 2007, Samos, Greece [Conference Paper]
  • P.J. de Langen, B.H.H. Juurlink, Trade-offs Between Voltage Scaling and Processor Shutdown for Low-Energy Embedded Multiprocessors [55] (July 2007), 7th International Workshop on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS 2007), 16-19 July 2007, Samos, Greece [Conference Paper]
  • P.J. de Langen, B.H.H. Juurlink, Combining Voltage Scaling and Processor Shutdown to Reduce Energy Consumption in Embedded Multiprocessors (June 2007), 13th Annual Conference of the Advanced School for Computing ang Imaging (ASCI 2007), June 2007, Heijen, The Netherlands [Conference Paper]
  • A. Shahbahrami, B.H.H. Juurlink, S. Vassiliadis, Accelerating Color Space Conversion Using Extended Subwords and the Matrix Register File [56](December 2006), 8th IEEE International Symposium on Multimedia (ISM 2006), 11-13 December 2006, San Diego, USA [Conference Paper]
  • I.S. Irobi, B.H.H. Juurlink, On-chip Scratchpad Memory Size Prediction and Allocation for Multiprocess Embedded Applications [57] (November 2006), 17th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2006), 23-24 November 2006, Veldhoven, The Netherlands [Conference Paper]
  • P.J. de Langen, B.H.H. Juurlink, Reducing Conflict Misses in Caches by Using Application Specific Placement Functions [58] (November 2006), 17th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2006), 23-24 November 2006, Veldhoven, The Netherlands [Conference Paper]
  • A. Shahbahrami, B.H.H. Juurlink, S. Vassiliadis, Performance Impact of Misaligned Accesses in SIMD Extensions [59] (November 2006), 17th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2006), 23-24 November 2006, Veldhoven, The Netherlands [Conference Paper]
  • A. Shahbahrami, B.H.H. Juurlink, S. Vassiliadis, Limitations of Special Purpose Instructions for Similarity Measurements in Media SIMD Extensions [60] (October 2006), International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES 2006), 23-25 October 2006, Seoul, Korea [Conference Paper]
  • A. Shahbahrami, B.H.H. Juurlink, D. Borodin, S. Vassiliadis, Avoiding Conversion and Rearrangement Overhead in SIMD Architectures [61] (June 2006), International Journal of Parallel Programming (IJPP), volume 34, issue 3 [Journal Paper]
  • A. Shahbahrami, B.H.H. Juurlink, S. Vassiliadis, Improving the Memory Behavior of Vertical Filtering in the Discrete Wavelet Transform [62] (May 2006), 3rd International Conference on Computing Frontiers (CF 2006), 3-5 May 2006, Ischia, Italy [Conference Paper]
  • P.J. de Langen, B.H.H. Juurlink, Leakage-Aware Multiprocessor Scheduling for Low Power [63] (April 2006), 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 25-29 April 2006, Rhodes Island, Greece [Conference Paper]
  • A. Shahbahrami, B.H.H. Juurlink, S. Vassiliadis, Efficient Vectorization of the FIR Filter [64]  (November 2005), 16th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2005), 17-18 November 2005, Veldhoven, The Netherlands [Conference Paper]
  • S. Suijkerbuijk, B.H.H. Juurlink, Implementing Hardware Multithreading in a VLIW Processor [65](November 2005), 17th IASTED International Conference on Parallel and Distributed Computing Systems (PDCS 2005), 14-16 November 2005, Phoenix, USA [Conference Paper]
  • P.J. de Langen, B.H.H. Juurlink, S. Vassiliadis, Multiprocessor Scheduling to Reduce Leakage Power [66] (November 2005), 16th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2005), 17-18 November 2005, Veldhoven, The Netherlands [Conference Paper]
  • D. Borodin, A. Terechko, B.H.H. Juurlink, P. Stravers, Optimisation of Multimedia Applications for the Philips Wasabi Multiprocessor System [67] (November 2005), 16th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2005), 17-18 November 2005, Veldhoven, The Netherlands [Conference Paper]
  • A. Shahbahrami, B.H.H. Juurlink, S. Vassiliadis, Performance Comparison of SIMD Implementations of the Discrete Wavelet Transform [68](July 2005), 16th IEEE International Conference on Application-Specific Systems, Architectures, and Processors (ASAP 2005), 23-25 July 2005, Samos, Greece [Conference Paper]
  • A. Shahbahrami, B.H.H. Juurlink, S. Vassiliadis, Matrix Register File and Extended Subwords: Two Techniques for Embedded Media Processors [69](May 2005), 2nd Conference on Computing Frontiers (CF 2005), 4-6 May 2005, Ischia, Italy [Conference Paper]
  • B.H.H. Juurlink, A. Shahbahrami, S. Vassiliadis, Avoiding Data Conversions in Embedded Media Processors [70](March 2005), 20th ACM Symposium on Applied Computing (SAC 2005), 13 -17 March 2005, Santa Fe, USA [Conference Paper]
  • D. Cheresiz, B.H.H. Juurlink, S. Vassiliadis, H.A.G. Wijshoff, The CSI Multimedia Architecture [71] (January 2005), IEEE Transactions On Very Large Scale Integration (VLSI) Systems (TVLSI), volume 13, issue 1 [Journal Paper]
  • S. Suijkerbuijk, P. Stravers, S. Vassiliadis, B.H.H. Juurlink, Performance Evaluation of Interleaved Multithreading in a VLIW Architecture [72](November 2004), 15th Annual Workshop on Circuits, Systems and Signal Processing (ProRisc 2004), 25-26 November 2004, Veldhoven, The Netherlands [Conference Paper]
  • X. Li, J.T.J. van Eijndhoven, B.H.H. Juurlink, 3D-TV Rendering on a Multiprocessor System on a Chip [73](November 2004), 15th Annual Workshop on Circuits, Systems and Signal Processing (ProRisc 2004), 25-26 November 2004, Veldhoven, The Netherlands [Conference Paper]
  • R. Bos, B.H.H. Juurlink, Performance Benefits of Relaxed Memory Consistency for Process Network Applications [74] (November 2004), 15th Annual Workshop on Circuits, Systems and Signal Processing (ProRisc 2004), 25-26 November 2004, Veldhoven, The Netherlands [Conference Paper]
  • I. Antochi, B.H.H. Juurlink, S. Vassiliadis, P. Liuha, Efficient Tile-Aware Bounding-Box Overlap Test for Tile Based Rendering [75](November 2004), International Symposium on System-on-Chip (SOC 2004), 16-18 November 2004, Tampere, Finland [Conference Paper]
  • I. Antochi, B.H.H. Juurlink, S. Vassiliadis, P. Liuha, Efficient State Management for Tile-Based 3D Graphics Architectures [76](November 2004), 15th Annual Workshop on Circuits, Systems and Signal Processing (ProRisc 2004), 25-26 November 2004, Veldhoven, The Netherlands [Conference Paper]
  • P.J. de Langen, B.H.H. Juurlink, S. Vassiliadis, HandBench: A Benchmarking Suite for Processors Embedded in Handheld Devices [77](November 2004), 15th Annual Workshop on Circuits, Systems and Signal Processing (ProRisc 2004), 25-26 November 2004, Veldhoven, The Netherlands [Conference Paper]
  • A. Shahbahrami, B.H.H. Juurlink, S. Vassiliadis, A Comparison Between Processor Architectures for Multimedia Applications [78](November 2004), 15th Annual Workshop on Circuits, Systems and Signal Processing (ProRisc 2004), 25-26 November 2004, Veldhoven, The Netherlands [Conference Paper]
  • I. Antochi, B.H.H. Juurlink, S. Vassiliadis, P. Liuha, Scene Management Models and Overlap Tests for Tile-Based Rendering [79] (August 2004), 7th Euromicro Symposium on Digital Systems Design (DSD 2004), 31 August - 3 September 2004, Rennes, France [Conference Paper]
  • I. Antochi, B.H.H. Juurlink, S. Vassiliadis, P. Liuha, Memory Bandwidth Requirements of Tile-Based Rendering [80](July 2004), 4th International Workshop on Systems, Architectures, Modeling, and Simulation (SAMOS 2004), 19-21 July 2004, Samos, Greece [Conference Paper]
  • I. Antochi, B.H.H. Juurlink, S. Vassiliadis, P. Liuha, GraalBench: A 3D Graphics Benchmark Suite for Mobile Phones [81](June 2004), ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES 2004), 11-13 June 2004, Washington DC, USA [Conference Paper]
  • B.H.H. Juurlink, Approximating the Optimal Replacement Algorithm [82] (April 2004), 1st ACM International Conference on Computing Frontiers (CF 2004), 14-16 April 2004, Ischia, Italy [Conference Paper]
  • P.J. de Langen, B.H.H. Juurlink, Reducing Traffic Generated by Conflict Misses in Caches [83](April 2004), 1st ACM International Conference on Computing Frontiers (CF 2004), 14-16 April 2004, Ischia, Italy [Conference Paper]
  • B.H.H. Juurlink, P.J. de Langen, Dynamic Techniques to Reduce Memory Traffic in Embedded Systems [84] (April 2004), 1st ACM International Conference on Computing Frontiers (CF 2004), 14-16 April 2004, Ischia, Italy [Conference Paper]
  • P.T. Stathis, D. Cheresiz, S. Vassiliadis, B.H.H. Juurlink, Sparse Matrix Transpose Unit [85] (April 2004), 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 26-30 April 2004, Santa Fe, USA [Conference Paper]
  • P.T. Groen, P. Hamalainen, B.H.H. Juurlink, T.D. Hamalainen, Accelerating the Secure Remote Password Protocol Using Reconfigurable Hardware [86](April 2004), 1st ACM International Conference on Computing Frontiers (CF 2004), 14-16 April 2004, Ischia, Italy [Conference Paper]
  • D. Cheresiz, B.H.H. Juurlink, S. Vassiliadis, H.A.G. Wijshoff, Implementation of a Streaming Execution Unit [87](December 2003), Journal of Systems Architecture - Embedded System Design (JSA), volume 49, issue 12-15 [Journal Paper]
  • P.T. Groen, P. Hamalainen, T.D. Hamalainen, B.H.H. Juurlink, Hardware Acceleration of the SRP Authentication Protocol [88](November 2003), 14th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2003), 27-29 November 2003, Veldhoven, The Netherlands [Conference Paper]
  • I. Antochi, B.H.H. Juurlink, S. Vassiliadis, P. Liuha, 3D Graphics Benchmarks for Low-Power Architectures [89](November 2003), 14th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2003), 27-29 November 2003, Veldhoven, The Netherlands [Conference Paper]
  • B.H.H. Juurlink, K.L.M. Bertels, B. Li, A Flexible Simulator of Pipelined Processors [90] (November 2003), 14th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2003), 27-29 November 2003, Veldhoven, The Netherlands [Conference Paper]
  • P.J. de Langen, B.H.H. Juurlink, Reducing Conflict Misses in Caches [91] (November 2003), 14th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2003), 27-29 November 2003, Veldhoven, The Netherlands [Conference Paper]
  • B. An, S. Balakrishnan, C.H. van Berkel, D. Cheresiz, B.H.H. Juurlink, S. Vassiliadis, Implementation of MPEG-4 on Philips co Vector Processor [92](November 2003), 14th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2003), 27-29 November 2003, Veldhoven, The Netherlands [Conference Paper]
  • B.H.H. Juurlink, Unified Dual Data Caches [93] (September 2003), Euromicro Symposium on Digital Systems Design (DSD 2003), 3-5 September 2003, Belek, Turkey [Conference Paper]
  • B.H.H. Juurlink, P. Kolman, F. Meyer auf der Heide, I. Rieping, Optimal Broadcast on Parallel Locality Models [94](April 2003), Journal of Discrete Algorithms (JDA), volume 1, issue 2 [Journal Paper]
  • O. Bonorden, B.H.H. Juurlink, I. von Otte, I. Rieping, The Paderborn University BSP (PUB) Library [95](February 2003), Parallel Computing, volume 29, issue 2 [Journal Paper]
  • D. Cheresiz, B.H.H. Juurlink, S. Vassiliadis, H.A.G. Wijshoff, Architectural support for 3D graphics in the complex streamed instruction set [96](December 2002), International Journal of Parallel and Distributed Systems and Networks (IJPDSN), volume 5, issue 4 [Journal Paper]
  • P.J. de Langen, B.H.H. Juurlink, Off-chip memory traffic measurements of low-power embedded systems [97](November 2002), 13th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2002), 27-29 November 2002, Veldhoven, The Netherlands [Conference Paper]
  • D. Hofstee, B.H.H. Juurlink, Determining the criticality of processes in Kahn process networks for design space exploration [98] (November 2002), 13th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2002), 27-29 November 2002, Veldhoven, The Netherlands [Conference Paper]
  • D. Cheresiz, B.H.H. Juurlink, S. Vassiliadis, Performance Benefits of Special-Purpose Instructions in the CSI Architecture [99](November 2002), 13th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2002), 27-29 November 2002, Veldhoven, The Netherlands [Conference Paper]
  • D. Cheresiz, B.H.H. Juurlink, S. Vassiliadis, H.A.G. Wijshoff, Architectural support for 3D graphics in the complex streamed instruction set [100](November 2002), 14th International Conference on Parallel and Distributed Computing Systems (PDCS 2002), 4-6 November 2002, Cambridge, USA , Best paper award in the area of processor architecture [Conference Paper]
  • I. Antochi, B.H.H. Juurlink, S. Vassiliadis, A Flexible Simulator for Exploring Hardware Rasterizers [101](November 2002), 13th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2002), 27-29 November 2002, Veldhoven, The Netherlands [Conference Paper]
  • I. Antochi, B.H.H. Juurlink, S. Vassiliadis, Selecting the optimal tile size for low-power tile-based rendering [102](November 2002), 13th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2002), 27-29 November 2002, Veldhoven, The Netherlands [Conference Paper]
  • D. Cheresiz, B.H.H. Juurlink, S. Vassiliadis, H.A.G. Wijshoff, Implementation of a streaming execution unit [103](September 2002), Euromicro Symposium on Digital Systems Design (DSD 2002), 4-6 September 2002, Dortmund, Germany [Conference Paper]
  • D. Cheresiz, B.H.H. Juurlink, S. Vassiliadis, H.A.G. Wijshoff, Performance scalability of multimedia instruction set extensions [104](August 2002), 8th International Euro-Par Conference on Parallel Processing (Euro-Par 2002), 27-30 August 2002, Paderborn, Germany [Conference Paper]
  • I. Lemberski, M. Koegst, S.D. Cotofana, B.H.H. Juurlink, FSM Non-minimal state encoding for low power [105] (May 2002), 23rd International Conference on Microelectronics, 12-15 May 2002, Nis, Yugoslavia [Conference Paper]
  • I. Antochi, B.H.H. Juurlink, A.G.M. Cilio, P. Liuha, Trading efficiency for energy in a texture cache architecture [106](April 2002), 4th International Conference on Massively Parallel Computing Systems (MPCS 2002), 10-12 April 2002, Ischia, Italy [Conference Paper]
  • I. Antochi, B.H.H. Juurlink, S. Vassiliadis, A low power 2D/3D graphics accelerator; A preliminary ISA (January 2002), CE technical report [Technical Report]
  • I. Antochi, B.H.H. Juurlink, A.G.M. Cilio, A low-cost, power-efficient texture cache architecture [107] (November 2001), 12th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2001), 29-30 November 2001, Veldhoven, The Netherlands [Conference Paper]
  • B.H.H. Juurlink, D. Cheresiz, S. Vassiliadis, H.A.G. Wijshoff, Implementation and Evaluation of the Complex Streamed Instruction Set [108](September 2001), International Conference on Parallel Architectures and Compilation Techniques (PACT 2001), 8-12 September 2001, Barcelona, Spain [Conference Paper]
  • D. Cheresiz, B.H.H. Juurlink, S. Vassiliadis, H.A.G. Wijshoff, Performance of the complex streamed instruction set on image processing kernels [109] (August 2001), 7th International Euro-Par Conference on Parallel Processing (Euro-Par 2001), 28-31 August 2001, Manchester, UK [Conference Paper]
  • B.H.H. Juurlink, I. Rieping, Performance Relevant Issues for Parallel Computation Models [110] (June 2001), International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA 2001), 25-28 June 2001, Las Vegas, USA [Conference Paper]
  • S.D. Cotofana, B.H.H. Juurlink, S. Vassiliadis, Counter Based Superscalar Instruction Issuing [111] (September 2000), 26th EUROMICRO 2000 Conference, Informatics: Inventing the Future (EUROMICRO 2000), 5-7 September 2000, Maastricht, The Netherlands [Conference Paper]
  • S. Vassiliadis, B.H.H. Juurlink, E.A. Hakkennes, Complex streamed instructions: introduction and initial evaluation [112] (September 2000), 26th EUROMICRO 2000 Conference, Informatics: Inventing the Future (EUROMICRO 2000), 5-7 September 2000, Maastricht, The Netherlands [Conference Paper]
  • B.H.H. Juurlink, P. Kolman, F. Meyer auf der Heide, I. Rieping, Optimal Broadcast on Parallel Locality Models [113] (June 2000), 7th International Colloquium on Structural Information and Communication Complexity (SIROCCO 2000), 20-22 June 2000, Laquila, Italy [Conference Paper]
  • B.H.H. Juurlink, H. A. G. Wijshoff, A Quantitative Comparison of Parallel Computation Models [114], ACM Transactions on Computer Systems, pp. 271-218, August 1998
  • M. Adler, W. Dittrich, B.H.H. Juurlink, M. Kutylowski, I. Rieping, Communication-Optimal Parallel Minimum Spanning Tree Algorithms [115], Proc. 10th ACM Symp. on Parallel Algorithms and Architectures (SPAA '98), pp. 27-36, Puerto Vallarta, Mexico, June 1998
  • B.H.H. Juurlink, Experimental Validation of Parallel Computation Models on the Intel Paragon [116], 1998 IPPS/SPDP, pp. 492-497, Orlando, FL. USA, March 1998
  • B.H.H. Juurlink, J. F. Sibeyn, P. S. Rao, Gossiping on Meshes and Tori [117], IEEE Transactions on Parallel and Distributed Systems, pp. 513-525, January 1998, ISSN: 1045-9219
  • J. F. Sibeyn, B.H.H. Juurlink, P. S. Rao, Worm-Hole Gossiping on Meshes [118], Proc. Euro-Par'96, vol.I, (LNCS 1123), September 1996
  • B.H.H. Juurlink, H. A. G. Wijshoff, Communication Primitives for BSP Computers [119], Information Processing Letters 58, January 1996
  • B.H.H. Juurlink, H. A. G. Wijshoff, The E-BSP Model: Incorporating General Locality and Unbalanced Communication into the BSP Model [120], Proc. Euro-Par'96, vol.II, (LNCS 1124), January 1996
  • B.H.H. Juurlink, H. A. G. Wijshoff, A Quantitative Comparison of Parallel Computation Models [121], Proc. 8th ACM Symp. on Parallel Algorithms and Architectures (SPAA'96), January 1996
  • B.H.H. Juurlink, J. F. Sibeyn, Fast Routing on Weak Hypercubes: Making the Valiant-Brebner Algorithm More Practical [122], Proc. of the Int. Conf. on High Performance Computing (HiPC'95), January 1995
  • B.H.H. Juurlink, H. A. G. Wijshoff, The Parallel Hierarchical Memory Model [123], Proc. of the 4th Scandinavian Workshop on Algorithm Theory (SWAT'94), (LNCS 824)., January 1994
  • B.H.H. Juurlink, H. A. G. Wijshoff, Experiences With a Model for Parallel Computation [124], Proc. 12th Annual ACM Symp. on Principles of Distributed Computing (PODC'93), January 1993
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