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Prof. Dr. Ben Juurlink

Biography

Lupe

Prof. Dr. Ben Juurlink received the M.Sc. degree from Utrecht University, Utrecht, The Netherlands, and the Ph.D. degree from Leiden University, Leiden, The Netherlands, in 1992 and 1997, respectively.

In 1997-1998 he worked as a post-doctoral researcher at the Heinz Nixdorf Institute in Paderborn, Germany, and from 1998 to 2009 he was a faculty member (first assistant professor, then associate professor) of the Computer Engineering Laboratory of Delft University of Technology, Delft, The Netherlands. Currently, he is professor for Embedded Systems Architectures in the Faculty of Electrical Engineering and Computer Science of Berlin University of Technology, Berlin, Germany. He is also co-founder of Spin Digital GmbH.

Dr. Juurlink’s research interests include multi- and many-core processors, reconfigurable computing, and the art of mapping applications effectively and efficiently to computer architectures. He has (co-)authored more than 130 articles in international conferences and journals, and received best paper awards at the IASTED International Conference on Parallel and Distributed Computing and Systems (PDCS) in 2002, and at the third IEEE International Conference on Consumer Electronics – Berlin (ICCE-Berlin). He has also received a Technology Transfer Award from the HiPEAC Network of Excellence for transferring some of the video coding technology that has been developed in his group to a Greece-based SME.

Dr. Juurlink is a senior member of the ACM and a senior member of the IEEE. He has been the Principal Investigator of several national research projects, Work Package leader in several European projects, and Coordinator of the EU projects LPGPU, Film265, and LPGPU2. He has served on many program committees, is an editor of the Elsevier journal on Microprocessors and Microsystems: Embedded Hardware Design, and was the general co-chair of the HiPEAC conference in 2013.

Professional Experience

Professor for Embedded Systems Architectures


Berlin University of Technology, Germany


01/2010 -
present


Associate professor


Delft University of Technology, Netherlands


02/2007 - 12/2009


Director of education for master's programs in Computer Engineering and Embedded Systems


Delft University of Technology, Netherlands


09/2006 - 12/2009


Assistant professor


Delft University of Technology, Netherlands


09/1999 - 01/2007


Postdoctoral fellow


Delft University of Technology, Netherlands


09/1998 - 08/1999


Postdoctoral fellow


Paderborn University, Germany


01/1997 - 07/1998


Postdoctoral fellow


Leiden University, Netherlands


09/1996 - 12/1996


Visiting researcher


Max-Planck-Institut für Informatik, Saarbrücken, Germany


02/1995


Research assistant


Leiden University, Netherlands


09/1992 - 08/1996


Teaching assistant


Utrecht University, Netherlands


09/1990 - 01/1992


Education

PhD degree in computer science


Leiden University, Netherlands. Thesis title: Computational models for parallel computers


02/1997


MSc degree in computer science


Utrecht University, Netherlands


08/1992


Publikationen

Chi Ching Chi and Ben Juurlink and C.H. Meenderinck (2010). Evaluation of Parallel H.264 Decoding Strategies for the Cell Broadband Engine. Proceedings International Conference on Supercomputing (ICS)


D. Borodin and Ben Juurlink (2010). Protective Redundancy Overhead Reduction Using Instruction Vulnerability Factor. Proceedings of the ACM International Conference on Computing Frontiers


D. Borodin and Ben Juurlink (2010). Instruction Precomputation with Memoization for Fault Detection. DATE-2010: Proceedings of the Design, Automation and Test in Europe


Stefan Hauser and Nico Moser and Carsten Gremzow and Ben Juurlink (2010). Transport Triggered Interconnection Network for a Scalable Application-Specific Processor. ACACES 2010 - Poster Abstracts. High Performance and Embedded Architecture and Compilation, 155–158.


Alex Ramirez and Felipe Cabarcas and Ben Juurlink and Mauricio Alvarez Mesa and Friman Sanchez and Arnaldo Azevedo and Cor Meenderinck and Catalin Ciobanu and Sebastian Isaza and Gerogi Gaydadjiev (2010). The SARC Architecture. Micro, IEEE, 16 -29.


C.H. Meenderinck and Ben Juurlink (2010). A Case for Hardware Task Management Support for the StarSS Programming Model. Proceedings Conference on Digital System Design Architectures, Methods and Tools


M Briejer and C.H. Meenderinck and Ben Juurlink (2010). Extending the Cell SPE with Energy Efficient Branch Prediction. Proceedings Euro-Par Conference


Gervin Thomas and Ben Juurlink and Dietmar Tutsch (2011). Traffic Prediction for NoCs using Fuzzy Logic. High-performance and hardware-aware Computing - Proceedings of the Second International Workshop on New Frontiers in High-performane and Hardware-aware Computing (in Conjunction with HPCA-17). KIT Scientific Publishing, 33-40.


A. Azevedo and Ben Juurlink (2011). An Instruction to Accelerate Software Caches. To appear in the Proceedings of the 2011 Conference on Architecture of Computing Systems (ARCS 2011)


J. Ambrose and A. Molnos and A. Nelson and K. Goossens and S. Cotofana and Ben Juurlink (2011). Composable Local Memory Organisation for Streaming Applications on Embedded MPSoCs. Proceedings of the ACM International Conference on Computing Frontiers


Chi Ching Chi and Ben Juurlink (2011). A QHD-Capable Parallel H.264 Decoder. Proceedings 25th International Conference on Supercomputing


J. A. Ambrose and Ben Juurlink and S. Irobi (2011). Scratchpad Memory Size Optimization for Real-Time Multiprocess Embedded Applications. World Congress on Computer Science and Information Engineering


Tamer Dallou and Ben Juurlink and Cor Meenderinck (2011). Improving the Scalability and Capabilities of the Nexus Hardware Task Management System. First International Workshop on Future Architectural Support for Parallel Programming


Michael Andersch and Ben Juurlink and Chi Ching Chi (2011). A Benchmark Suite for Evaluating Parallel Programming Models. Proceedings 24th Workshop on Parallel Systems and Algorithms


Madhavan Manivannan and Ben Juurlink and Per Stenstrom (2011). Implications of Merging Phases on Scalability of Multi-core Architectures. Parallel Processing, International Conference on. IEEE Computer Society, 622-631.


Ältere Publikationen

Ältere Publikationen von Prof. Juurlink finden sich hier.

Zusatzinformationen / Extras

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Leiter:
Prof. Dr. Ben Juurlink
Raum E-N 642
Tel. +49.30.314-73130/73131
Termin anfragen

Sekretariat:
Sara Tennstedt
Raum E-N 645
Tel. +49.30.314-73130
Öffnungszeiten:
Mo, Di, Mi und Do 10:00 - 12:00 Uhr
und nach Vereinbarung


Postanschrift:
Technische Universität Berlin
Institut für Technische Informatik und Mikroelektronik (TIME)
Sekretariat EN 12
Einsteinufer 17 - 6.OG
D-10587 Berlin
Germany

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