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Prof. Dr. Ben Juurlink

Biography

Lupe

Prof. Dr. Ben Juurlink received the M.Sc. degree from Utrecht University, Utrecht, The Netherlands, and the Ph.D. degree from Leiden University, Leiden, The Netherlands, in 1992 and 1997, respectively.

In 1997-1998 he worked as a post-doctoral researcher at the Heinz Nixdorf Institute in Paderborn, Germany, and from 1998 to 2009 he was a faculty member (first assistant professor, then associate professor) of the Computer Engineering Laboratory of Delft University of Technology, Delft, The Netherlands. Currently, he is professor for Embedded Systems Architectures in the Faculty of Electrical Engineering and Computer Science of Berlin University of Technology, Berlin, Germany. He is also co-founder of Spin Digital GmbH.

Dr. Juurlink’s research interests include multi- and many-core processors, reconfigurable computing, and the art of mapping applications effectively and efficiently to computer architectures. He has (co-)authored more than 130 articles in international conferences and journals, and received best paper awards at the IASTED International Conference on Parallel and Distributed Computing and Systems (PDCS) in 2002, and at the third IEEE International Conference on Consumer Electronics – Berlin (ICCE-Berlin). He has also received a Technology Transfer Award from the HiPEAC Network of Excellence for transferring some of the video coding technology that has been developed in his group to a Greece-based SME.

Dr. Juurlink is a senior member of the ACM and a senior member of the IEEE. He has been the Principal Investigator of several national research projects, Work Package leader in several European projects, and Coordinator of the EU projects LPGPU, Film265, and LPGPU2. He has served on many program committees, is an editor of the Elsevier journal on Microprocessors and Microsystems: Embedded Hardware Design, and was the general co-chair of the HiPEAC conference in 2013.

Professional Experience

Professor for Embedded Systems Architectures


Berlin University of Technology, Germany


01/2010 -
present


Associate professor


Delft University of Technology, Netherlands


02/2007 - 12/2009


Director of education for master's programs in Computer Engineering and Embedded Systems


Delft University of Technology, Netherlands


09/2006 - 12/2009


Assistant professor


Delft University of Technology, Netherlands


09/1999 - 01/2007


Postdoctoral fellow


Delft University of Technology, Netherlands


09/1998 - 08/1999


Postdoctoral fellow


Paderborn University, Germany


01/1997 - 07/1998


Postdoctoral fellow


Leiden University, Netherlands


09/1996 - 12/1996


Visiting researcher


Max-Planck-Institut für Informatik, Saarbrücken, Germany


02/1995


Research assistant


Leiden University, Netherlands


09/1992 - 08/1996


Teaching assistant


Utrecht University, Netherlands


09/1990 - 01/1992


Education

PhD degree in computer science


Leiden University, Netherlands. Thesis title: Computational models for parallel computers


02/1997


MSc degree in computer science


Utrecht University, Netherlands


08/1992


Publications

Sohan Lal and Jan Lucas and Ben Juurlink (2017). E²MC: Entropy Encoding based Memory Compression for GPUs. Proc. 31st IEEE Int. Parallel and Distributed Processing Symposium (IPDPS)


Biagio Cosenza and Juan Durillo and Stefano Ermon and Ben Juurlink (2017). Autotuning Stencil Computations with Structural Ordinal Regression Learning. IEEE International Parallel and Distributed Processing Symposium (IPDPS), 287–296.


Philipp Habermann and Chi Ching Chi and Mauricio Alvarez-Mesa and Ben Juurlink (2017). Application-specific Cache and Prefetching for HEVC CABAC Decoding. IEEE Multimedia, Volume 24, Issue 1, Jan.-Mar. 2017, 72-85.


Matthias Göbel and Ahmed Elhossini and Ben Juurlink (2017). A Methodology for Predicting Application-specific Achievable Memory Bandwidth for HW/SW-Codesign. Proc. Euromicro Conference on Digital System Design (DSD 2017)


Angela Pohl and Biagio Cosenza and Ben Juurlink (2017). Correlating Cost with Performance in LLVM. Proceedings of the 13th International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems (ACACES 2017), 133-136.


Philipp Habermann and Chi Ching Chi and Mauricio Alvarez-Mesa and Ben Juurlink (2017). Improved Wavefront Parallel Processing for HEVC Decoding. Proceedings of the 13th International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems (ACACES 2017), 253-256.


Biao Wang and Diego F. de Souza and Mauricio Alvarez-Mesa and Chi Ching Chi and Ben Juurlink and Aleksandar Ilic and Nuno Roma and Leonel Sousa (2017). GPU Parallelization of HEVC In-Loop Filters. International Journal of Parallel Programming, 1–21.


Nikita Popov and Biagio Cosenza and Ben Juurlink and Dmitry Stogov (2017). Static Optimization in PHP 7. 26th International Conference on Compiler Construction (CC), 65–75.


Ben Juurlink and Jan Lucas and Nadjib Mammeri and Martyn Bliss and Georgios Keramidas and Chrysa Kokkala and Andrew Richards (2017). The LPGPU2 Project: Low-Power Parallel Computing on GPUs: Extended Abstract. Proceedings of the 20th International Workshop on Software and Compilers for Embedded Systems. ACM, 76–80.


Philipp Habermann and Chi Ching Chi and Mauricio Alvarez-Mesa and Ben Juurlink (2017). Syntax Element Partitioning for high-throughput HEVC CABAC Decoding. Proceedings of the 2017 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP 2017), 1308-1312.


Matthias Göbel and Ahmed Elhossini and Chi Ching Chi and Mauricio Alvarez-Mesa and Ben Juurlink (2017). A Quantitative Analysis of the Memory Architecture of FPGA-SoCs (Best paper award a the 13th ARC 2017). Applied Reconfigurable Computing: 13th International Symposium, ARC 2017, Delft, The Netherlands, April 3-7, 2017, Proceedings. Springer International Publishing, 241–252.


Biao Wang and Diego F. de Souza and Mauricio Alvarez-Mesa and Chi Ching Chi and Ben Juurlink and Aleksandar Ilic and Nuno Roma and Leonel Sousa (2016). Efficient HEVC decoder for heterogeneous CPU with GPU systems. 2016 IEEE 18th International Workshop on Multimedia Signal Processing (MMSP), 1-6.


Maurice Peemen and Runbin Shi and Sohan Lal and Ben Juurlink and Bart Mesman and Henk Corporaal (2016). The Neuro Vector Engine: Flexibility to Improve Convolutional Net Efficiency for Wearable Vision. Proc. Int. Conf on Design Automation, and Test in Europe,(DATE)


Angela Pohl and Biagio Cosenza and Mauricio Alvarez Mesa and Chi Ching Chi and Ben H. H. Juurlink (2016). An evaluation of current SIMD programming models for C++. Proceedings of the 3rd Workshop on Programming Models for SIMD/Vector Processing, WPMVP@PPoPP 2016, Barcelona, Spain, March 13, 2016, 3:1–3:8.


Matthias Göbel and Ahmed Elhossini and Ben Juurlink (2016). A Trace-based Workflow for Evaluating Application-specific Memory Bandwidth for FPGA-SoCs. Proc. 12th Int. Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems, Fiuggi, Italy (ACACES' 16)


Older Publications

Further Publications of Prof. Juurlink  are here available.

Zusatzinformationen / Extras

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Auxiliary Functions

Chair:
Prof. Dr. Ben Juurlink
Room E-N 642
Tel. +49.30.314-73130/73131
Request appointment

Secretary's office:
Sara Tennstedt
Room E-N 645
Tel. +49.30.314-73130
Consultation hours:
Mo, Tue, Wed and Thu 10:00 am - 12:00 am
or with appointment


Postal address:
Technische Universität Berlin
Institut für Technische Informatik und Mikroelektronik (TIME)
Sekretariat EN 12
Einsteinufer 17- 6. OG
D-10587 Berlin
Germany

AES Flyer:
AES Flyer 2017

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