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Welcome at AES

Lupe [1]

The Embedded Systems Architecture (Architektur eingebetteter Systeme, AES) group investigates and teaches the field of computer architecture, ranging from low-power embedded systems to massively parallel high-performance systems. We focus on the design, implementation and optimization of high performance embedded systems; taking into account the interactions between applications, tools, and architectures. In addition to high performance we also aim at improving energy efficiency, programmability, predictability, error resilience, as well as other features of emerging computer systems.


13.11.2017: AES paper accepted at DATE 2018 conference.

Lupe [2]

The paper "Optimal DC/AC Data Bus Inversion Coding" by Jan Lucas, Sohan Lal and Ben Juurlink has been accepted as regular paper at the DATE 2018 conference. In the paper a new method for data encoding is presented that reduces the energy consumption of the data transfer between CPU or GPU by up to 6%.  DATE (Design, Automation and Test in Europe) will held in March at the International Congress Center Dresden. The selection process was very competitive with an acceptance rate of regular papers of only 23.7%. More information can be found at https://www.date-conference.com/ [3].

03.11.2017: AES paper accepted at CGO 2018.

The paper "Local Memory-Aware Kernel Perforation" by Daniel Maier, Biagio Cosenza and Ben Juurlink has been accepted at the International Symposium on Code Generation and Optimization (CGO 2018) that will be held in Vienna, Austria.
In the paper, the authors propose a new local memory-aware approach designed for the approximation and acceleration of GPU applications. Experimental evaluations show that the technique accelerates applications from different domains while introducing only a small and acceptable error.
The International Symposium on Code Generation and Optimization [4] (CGO) provides a premier venue to bring together researchers and practitioners working at the interface of hardware and software on a wide range of optimization and code generation techniques and related issues.

20.10.17: AES Best-in-Class-Awards Summer 2017.

Lupe [5]

The Embedded Systems Architecture Group has given Best-in-Class Awards to the best students of the 2017 summer term. Kai Norman Clasen (Hot Topics in Embedded Systems), Leonard Wayne Hackel (Embedded Systems Architecture) and Rafael Fritsch (Advanced Computer Architectures) have shown outstanding performances in the respective courses. Congratulations!!!

More news can be found here [6].

Current Projects [7]

  • LPGPU2 [8]
  • High Performance Video Coding [9]
  • CompVision: Computer Vision Library for Reconfigurable Architectures [10]
more to: Current Projects [11]

Courses in WS 17/18 [12]

  • Rechnerorganisation Praktikum [13]
  • Rechnerorganisation (VL + Üb) [14]
  • Multicore Systems (VL + Üb) [15]
  • Recent Advances in Computer Architecture [16]
  • AES Bachelor Project [17]
  • Computer Arithmetic: Circuit Perspective [18]
  • Hardware-Praktikum [19]
  • Compiler Design (VL + Üb) [20]

  • F&A Mündliche Prüfung Rechnerorganisation [21]
more to: Courses in WS 17/18 [22]

Prof. Dr. Ben Juurlink
Room E-N 642
Tel. +49.30.314-73130/73131
Request appointment

Secretary's office:
Sara Tennstedt
Room E-N 645
Tel. +49.30.314-73130
Consultation hours:
Mo, Tue, Wed and Thu 10:00 am - 12:00 am
or with appointment
Contact [23]

Postal address:
Technische Universität Berlin
Institut für Technische Informatik und Mikroelektronik (TIME)
Sekretariat EN 12
Einsteinufer 17- 6. OG
D-10587 Berlin

AES Flyer:
AES Flyer 2017

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