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Welcome at AES

Lupe

The Embedded Systems Architecture (Architektur eingebetteter Systeme, AES) group investigates and teaches the field of computer architecture, ranging from low-power embedded systems to massively parallel high-performance systems. We focus on the design, implementation and optimization of high performance embedded systems; taking into account the interactions between applications, tools, and architectures. In addition to high performance we also aim at improving energy efficiency, programmability, predictability, error resilience, as well as other features of emerging computer systems.

News

Thursday June 1, 2017, 14:00 - 15:00, "Dataflow programming for manycores". Prof. Dr.-Ing. Jeronimo Castrillon.

Lupe

Title: Dataflow programming for manycores

Presenter: Prof. Dr.-Ing. Jeronimo Castrillon - TU Dresden

Date and time: Thursday June 1, 2017, 14:00 - 15:00

Room: MA 005

Dataflow-based programming has proven to be a good programming model for heterogeneous multi-processor systems on chip in the signal processing and multimedia domains. This is due to a clear separation of computation and communication, well-defined semantics and a strict distributed state. This talk provides an overview of the MAPS framework for mapping dataflow applications to manycores. It then delves into the details of recently proposed techniques for improving tool scalability, and adaptability and robustness of the computed mappings. This includes (i) a mathematical way to exploit symmetries in the problem formulation to reduce the design space, (ii) a runtime approach to select and execute variants of an application under resource constraints, and (iii) an algorithmic approach based on design centering to improve mapping robustness. 

Jeronimo Castrillon is a professor in the Department of Computer Science at the TU Dresden, where he is also affiliated with the Center for Advancing Electronics Dresden (CfAED). He received the Electronics Engineering degree from the Pontificia Bolivariana University in Colombia in 2004, the master degree from the ALaRI Institute in Switzerland in 2006 and the Ph.D. degree (Dr.-Ing.) with honors from the RWTH Aachen University in Germany in 2013. His research interests lie on methodologies, languages, tools and algorithms for programming complex computing systems. He has more than 50 international publications and has been a member of technical program and organization committees in international conferences and workshops (e.g.,  DATE, Computing Frontiers, CGO, FPL, ICCS and ESWeek). He is also a regular reviewer for ACM and IEEE journals (e.g., IEEE TCAD, IEEE TPDS, ACM TODAES and ACM TECS). In 2014 Prof. Castrillon co-founded Silexica GmbH, a company that provides programming tools for embedded multicore architectures.


2.5.2017: AES LPGPU2 team Introduces themselves on LPGPU2 website.

Lupe

AES LPGPU2 team introduces themselves on LPGPU2 website in a getting to know initiative.
In this initiative every partner of the LPGPU2 consortium posts short bio of every member of their team.
For more information please visit the LPGPU2 website.
http://lpgpu.org/wp/

26.04.2017: PC memberships Ben Juurlink.

Lupe

Prof. Ben Juurlink, head of the AES research group, currently is a member of several program committees:

  • SBAC-PAD (Int. Conf. on Computer Architecture and High Performance Computing)
  • SCOPES (Int. Workshop on Software and Compilers for Embedded Systems)
  • SAMOS (Int. Conf. on Embedded Computer Systems: Architectures, Modeling, and Simulation) and
  • PARS (Workshop of the special interest group on parallel algorithms, parallel computer structures and parallel system software within the German Informatics Societies (GI/ITG))
  • Euromicro DSD (Euromicro Conference on Digital System Design)

24.04.2017: Prof. Castrillon of TU Dresden guest lecturer for an AES course.

Lupe

We are very pleased to welcome Prof. Jeronimo Castrillon as a guest lecturer for the embedded systems architecture course during this summer. His compiler expertise will add a valuable contribution to the group's curricular activities.

More information about the Chair for Compiler Construction at TU Dresden can be found on the corresponding website: https://cfaed.tu-dresden.de/ccc-about

More news can be found here.

Research Seminar

  • 08.06.2017-10:00: "Design and implementation of a convolutional filter for deeplearning". Lars Schymik.
more to: Research Seminar

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Auxiliary Functions

Chair:
Prof. Dr. Ben Juurlink
Room E-N 642
Tel. +49.30.314-73130/73131
Asking for an appointment

Secretary's office:
Imke Weitkamp
Jana Pilz
Sara Tennstedt (parental leave)
Room E-N 645
Tel. +49.30.314-73130
Consultation hours:
Thur 9:00 am - 12:00 am
Phone hours:
Thur 9:00 am - 4:00 pm
or with appointment


Postal address:
Technische Universität Berlin
Institut für Technische Informatik und Mikroelektronik (TIME)
Sekretariat EN 12
Einsteinufer 17
D-10587 Berlin
Germany

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