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Welcome at AES

Lupe

The Embedded Systems Architecture (Architektur eingebetteter Systeme, AES) group investigates and teaches the field of computer architecture, ranging from low-power embedded systems to massively parallel high-performance systems. We focus on the design, implementation and optimization of high performance embedded systems; taking into account the interactions between applications, tools, and architectures. In addition to high performance we also aim at improving energy efficiency, programmability, predictability, error resilience, as well as other features of emerging computer systems.

21. June 2016: AES-Paper accepted for IEEE Multimedia Magazine.

The paper "Application-specific Cache and Prefetching for HEVC CABAC Decoding" by Philipp Habermann, Chi Ching Chi, Mauricio Alvarez-Mesa and Ben Juurlink has been accepted for publication in the IEEE Multimedia Magazine. more to: 21. June 2016: AES-Paper accepted for IEEE Multimedia Magazine.

Research Seminar

  • 23.06.2016-10:00am: " Design and Implementation of a Temperature Based Fan Controller for Desktop Computers". Arne Salzwedel.
  • 23.06.2016-10:30am: "Scaling HEVC Decoding to Many-cores". Julian Gog .
  • 30.06.2016-10:00am: "Improving performance scalability of a heterogeneous CPU+GPU HEVC decoder". Biao Wang.
  • 21.07.2016-10:00am: "Automated Characterization of GPU Features Using OpenCL Microbenchmarks". Felix Goroncy.
more to: Research Seminar

Zusatzinformationen / Extras

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Auxiliary Functions

Chair:
Prof. Dr. Ben Juurlink
Room E-N 642
Tel. +49.30.314-73130/73131
Fax +49.30.314-22943
Asking for an appointment

Secretary's office:
Imke Weitkamp
Jana Pilz
Sara Tennstedt (parental leave)
Room E-N 645
Tel. +49.30.314-73130
Fax +49.30.314-22943
Consultation hours:
Mo and Thur 9:00 am - 12:00
Tue 15:00 - 18:00
and with registration


Postal address:
Technische Universität Berlin
Institut für Technische Informatik und Mikroelektronik (TIME)
Sekretariat EN 12
Einsteinufer 17
D-10587 Berlin
Germany

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