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TU Berlin

Inhalt des Dokuments

Automatic Loop Vectorization

Description

Bild
VECT
Lupe

Every common processor architecture supports single-instruction multiple-data (SIMD) instructions, since SIMD instructions are potentially much more (power-) efficient than scalar instructions. However, auto-vectorizing compilers that exploit these instructions, such as the GCC compiler, do not achieve the same performance as handwritten code. The goal of this project is to identify why current auto-vectorization compiler technologies do not achieve the same level of performance as hand-optimized code and to propose new compiler and/or architecture techniques to bridge this gap.

People involved

Funding

This activity received funding from the European Community's Seventh Framework Programme [FP7/2007-2013] under the ENCORE Project (www.encore-project.eu), grant agreement n° 248647.

Zusatzinformationen / Extras

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Auxiliary Functions